Loading arch/arm/Kconfig +1 −17 Original line number Diff line number Diff line Loading @@ -30,7 +30,6 @@ config ARM select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) select HAVE_C_RECORDMCOUNT select HAVE_GENERIC_HARDIRQS select HAVE_SPARSE_IRQ select GENERIC_IRQ_SHOW select CPU_PM if (SUSPEND || CPU_IDLE) select GENERIC_PCI_IOMAP Loading @@ -55,9 +54,6 @@ config MIGHT_HAVE_PCI config SYS_SUPPORTS_APM_EMULATION bool config HAVE_SCHED_CLOCK bool config GENERIC_GPIO bool Loading Loading @@ -355,6 +351,7 @@ config ARCH_HIGHBANK select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU select HAVE_SMP select SPARSE_IRQ select USE_OF help Support for the Calxeda Highbank SoC based boards. Loading Loading @@ -443,7 +440,6 @@ config ARCH_MXC select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK select MULTI_IRQ_HANDLER help Support for Freescale MXC/iMX-based family of processors Loading Loading @@ -535,7 +531,6 @@ config ARCH_IXP4XX select CPU_XSCALE select GENERIC_GPIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI select DMABOUNCE if PCI help Loading Loading @@ -606,7 +601,6 @@ config ARCH_MMP select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -647,7 +641,6 @@ config ARCH_TEGRA select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_CPUFREQ Loading @@ -664,7 +657,6 @@ config ARCH_PICOXCELL select DW_APB_TIMER select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_SCHED_CLOCK select HAVE_TCM select NO_IOPORT select SPARSE_IRQ Loading Loading @@ -692,7 +684,6 @@ config ARCH_PXA select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -760,7 +751,6 @@ config ARCH_SA1100 select CPU_FREQ select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB select HAVE_IDE Loading Loading @@ -817,7 +807,6 @@ config ARCH_S5P64X0 select CLKSRC_MMIO select HAVE_S3C2410_WATCHDOG if WATCHDOG select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS help Loading Loading @@ -850,7 +839,6 @@ config ARCH_S5PV210 select ARM_L1_CACHE_SHIFT_6 select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG Loading Loading @@ -893,7 +881,6 @@ config ARCH_U300 depends on MMU select CLKSRC_MMIO select CPU_ARM926T select HAVE_SCHED_CLOCK select HAVE_TCM select ARM_AMBA select ARM_PATCH_PHYS_VIRT Loading Loading @@ -951,7 +938,6 @@ config ARCH_OMAP select ARCH_HAS_CPUFREQ select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select ARCH_HAS_HOLES_MEMORYMODEL help Support for TI's OMAP platform (OMAP1/2/3/4). Loading Loading @@ -1117,13 +1103,11 @@ config ARCH_ACORN config PLAT_IOP bool select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK config PLAT_ORION bool select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK config PLAT_PXA bool Loading arch/arm/Kconfig.debug +92 −92 Original line number Diff line number Diff line Loading @@ -81,41 +81,6 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL config DEBUG_LL_UART_NONE bool "No low-level debugging UART" help Say Y here if your platform doesn't provide a UART option below. This relies on your platform choosing the right UART definition internally in order for low-level debugging to work. config DEBUG_ICEDCC bool "Kernel low-level debugging via EmbeddedICE DCC channel" help Say Y here if you want the debug print routines to direct their output to the EmbeddedICE macrocell's DCC channel using co-processor 14. This is known to work on the ARM9 style ICE channel and on the XScale with the PEEDI. Note that the system will appear to hang during boot if there is nothing connected to read from the DCC. config DEBUG_SEMIHOSTING bool "Kernel low-level debug output via semihosting I" help Semihosting enables code running on an ARM target to use the I/O facilities on a host debugger/emulator through a simple SVC calls. The host debugger or emulator must have semihosting enabled for the special svc call to be trapped otherwise the kernel will crash. This is known to work with OpenOCD, as wellas ARM's Fast Models, or any other controlling environment that implements semihosting. For more details about semihosting, please see chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. config AT91_DEBUG_LL_DBGU0 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" depends on HAVE_AT91_DBGU0 Loading @@ -124,20 +89,6 @@ choice bool "Kernel low-level debugging on 9263, 9g45 and cap9" depends on HAVE_AT91_DBGU1 config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the 8250 at PCI COM1. config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the serial port in the DC21285 (Footbridge). config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X Loading @@ -152,6 +103,20 @@ choice Say Y here if you want the debug print routines to direct their output to the second serial port on these devices. config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the serial port in the DC21285 (Footbridge). config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the 8250 at PCI COM1. config DEBUG_HIGHBANK_UART bool "Kernel low-level debugging messages via Highbank UART" depends on ARCH_HIGHBANK Loading Loading @@ -222,6 +187,59 @@ choice Say Y here if you want kernel low-level debugging support on i.MX6Q. config DEBUG_MSM_UART1 bool "Kernel low-level debugging messages via MSM UART1" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the first serial port on MSM devices. config DEBUG_MSM_UART2 bool "Kernel low-level debugging messages via MSM UART2" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the second serial port on MSM devices. config DEBUG_MSM_UART3 bool "Kernel low-level debugging messages via MSM UART3" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the third serial port on MSM devices. config DEBUG_MSM8660_UART bool "Kernel low-level debugging messages via MSM 8660 UART" depends on ARCH_MSM8X60 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8660 devices. config DEBUG_MSM8960_UART bool "Kernel low-level debugging messages via MSM 8960 UART" depends on ARCH_MSM8960 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8960 devices. config DEBUG_REALVIEW_STD_PORT bool "RealView Default UART" depends on ARCH_REALVIEW help Say Y here if you want the debug print routines to direct their output to the serial port on RealView EB, PB11MP, PBA8 and PBX platforms. config DEBUG_REALVIEW_PB1176_PORT bool "RealView PB1176 UART" depends on MACH_REALVIEW_PB1176 help Say Y here if you want the debug print routines to direct their output to the standard serial port on the RealView PB1176 platform. config DEBUG_S3C_UART0 depends on PLAT_SAMSUNG bool "Use S3C UART 0 for low-level debug" Loading Loading @@ -255,58 +273,40 @@ choice The uncompressor code port configuration is now handled by CONFIG_S3C_LOWLEVEL_UART_PORT. config DEBUG_REALVIEW_STD_PORT bool "RealView Default UART" depends on ARCH_REALVIEW help Say Y here if you want the debug print routines to direct their output to the serial port on RealView EB, PB11MP, PBA8 and PBX platforms. config DEBUG_REALVIEW_PB1176_PORT bool "RealView PB1176 UART" depends on MACH_REALVIEW_PB1176 config DEBUG_LL_UART_NONE bool "No low-level debugging UART" help Say Y here if you want the debug print routines to direct their output to the standard serial port on the RealView PB1176 platform. Say Y here if your platform doesn't provide a UART option below. This relies on your platform choosing the right UART definition internally in order for low-level debugging to work. config DEBUG_MSM_UART1 bool "Kernel low-level debugging messages via MSM UART1" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 config DEBUG_ICEDCC bool "Kernel low-level debugging via EmbeddedICE DCC channel" help Say Y here if you want the debug print routines to direct their output to the first serial port on MSM devices. their output to the EmbeddedICE macrocell's DCC channel using co-processor 14. This is known to work on the ARM9 style ICE channel and on the XScale with the PEEDI. config DEBUG_MSM_UART2 bool "Kernel low-level debugging messages via MSM UART2" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the second serial port on MSM devices. Note that the system will appear to hang during boot if there is nothing connected to read from the DCC. config DEBUG_MSM_UART3 bool "Kernel low-level debugging messages via MSM UART3" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 config DEBUG_SEMIHOSTING bool "Kernel low-level debug output via semihosting I" help Say Y here if you want the debug print routines to direct their output to the third serial port on MSM devices. Semihosting enables code running on an ARM target to use the I/O facilities on a host debugger/emulator through a simple SVC calls. The host debugger or emulator must have semihosting enabled for the special svc call to be trapped otherwise the kernel will crash. config DEBUG_MSM8660_UART bool "Kernel low-level debugging messages via MSM 8660 UART" depends on ARCH_MSM8X60 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8660 devices. This is known to work with OpenOCD, as wellas ARM's Fast Models, or any other controlling environment that implements semihosting. config DEBUG_MSM8960_UART bool "Kernel low-level debugging messages via MSM 8960 UART" depends on ARCH_MSM8960 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8960 devices. For more details about semihosting, please see chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. endchoice Loading arch/arm/include/asm/hardware/it8152.h +3 −0 Original line number Diff line number Diff line Loading @@ -9,6 +9,9 @@ #ifndef __ASM_HARDWARE_IT8152_H #define __ASM_HARDWARE_IT8152_H #include <mach/irqs.h> extern void __iomem *it8152_base_address; #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) Loading arch/arm/include/asm/irq.h +6 −2 Original line number Diff line number Diff line #ifndef __ASM_ARM_IRQ_H #define __ASM_ARM_IRQ_H #define NR_IRQS_LEGACY 16 #ifndef CONFIG_SPARSE_IRQ #include <mach/irqs.h> #else #define NR_IRQS NR_IRQS_LEGACY #endif #ifndef irq_canonicalize #define irq_canonicalize(i) (i) #endif #define NR_IRQS_LEGACY 16 /* * Use this value to indicate lack of interrupt * capability Loading arch/arm/include/asm/mc146818rtc.h +3 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,9 @@ #define _ASM_MC146818RTC_H #include <linux/io.h> #include <mach/irqs.h> #include <linux/kernel.h> #define RTC_IRQ BUILD_BUG_ON(1) #ifndef RTC_PORT #define RTC_PORT(x) (0x70 + (x)) Loading Loading
arch/arm/Kconfig +1 −17 Original line number Diff line number Diff line Loading @@ -30,7 +30,6 @@ config ARM select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7)) select HAVE_C_RECORDMCOUNT select HAVE_GENERIC_HARDIRQS select HAVE_SPARSE_IRQ select GENERIC_IRQ_SHOW select CPU_PM if (SUSPEND || CPU_IDLE) select GENERIC_PCI_IOMAP Loading @@ -55,9 +54,6 @@ config MIGHT_HAVE_PCI config SYS_SUPPORTS_APM_EMULATION bool config HAVE_SCHED_CLOCK bool config GENERIC_GPIO bool Loading Loading @@ -355,6 +351,7 @@ config ARCH_HIGHBANK select GENERIC_CLOCKEVENTS select HAVE_ARM_SCU select HAVE_SMP select SPARSE_IRQ select USE_OF help Support for the Calxeda Highbank SoC based boards. Loading Loading @@ -443,7 +440,6 @@ config ARCH_MXC select CLKDEV_LOOKUP select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK select MULTI_IRQ_HANDLER help Support for Freescale MXC/iMX-based family of processors Loading Loading @@ -535,7 +531,6 @@ config ARCH_IXP4XX select CPU_XSCALE select GENERIC_GPIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select MIGHT_HAVE_PCI select DMABOUNCE if PCI help Loading Loading @@ -606,7 +601,6 @@ config ARCH_MMP select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -647,7 +641,6 @@ config ARCH_TEGRA select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_CLK select HAVE_SCHED_CLOCK select HAVE_SMP select MIGHT_HAVE_CACHE_L2X0 select ARCH_HAS_CPUFREQ Loading @@ -664,7 +657,6 @@ config ARCH_PICOXCELL select DW_APB_TIMER select GENERIC_CLOCKEVENTS select GENERIC_GPIO select HAVE_SCHED_CLOCK select HAVE_TCM select NO_IOPORT select SPARSE_IRQ Loading Loading @@ -692,7 +684,6 @@ config ARCH_PXA select ARCH_REQUIRE_GPIOLIB select GENERIC_CLOCKEVENTS select GPIO_PXA select HAVE_SCHED_CLOCK select TICK_ONESHOT select PLAT_PXA select SPARSE_IRQ Loading Loading @@ -760,7 +751,6 @@ config ARCH_SA1100 select CPU_FREQ select GENERIC_CLOCKEVENTS select CLKDEV_LOOKUP select HAVE_SCHED_CLOCK select TICK_ONESHOT select ARCH_REQUIRE_GPIOLIB select HAVE_IDE Loading Loading @@ -817,7 +807,6 @@ config ARCH_S5P64X0 select CLKSRC_MMIO select HAVE_S3C2410_WATCHDOG if WATCHDOG select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS help Loading Loading @@ -850,7 +839,6 @@ config ARCH_S5PV210 select ARM_L1_CACHE_SHIFT_6 select ARCH_HAS_CPUFREQ select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select HAVE_S3C2410_I2C if I2C select HAVE_S3C_RTC if RTC_CLASS select HAVE_S3C2410_WATCHDOG if WATCHDOG Loading Loading @@ -893,7 +881,6 @@ config ARCH_U300 depends on MMU select CLKSRC_MMIO select CPU_ARM926T select HAVE_SCHED_CLOCK select HAVE_TCM select ARM_AMBA select ARM_PATCH_PHYS_VIRT Loading Loading @@ -951,7 +938,6 @@ config ARCH_OMAP select ARCH_HAS_CPUFREQ select CLKSRC_MMIO select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK select ARCH_HAS_HOLES_MEMORYMODEL help Support for TI's OMAP platform (OMAP1/2/3/4). Loading Loading @@ -1117,13 +1103,11 @@ config ARCH_ACORN config PLAT_IOP bool select GENERIC_CLOCKEVENTS select HAVE_SCHED_CLOCK config PLAT_ORION bool select CLKSRC_MMIO select GENERIC_IRQ_CHIP select HAVE_SCHED_CLOCK config PLAT_PXA bool Loading
arch/arm/Kconfig.debug +92 −92 Original line number Diff line number Diff line Loading @@ -81,41 +81,6 @@ choice prompt "Kernel low-level debugging port" depends on DEBUG_LL config DEBUG_LL_UART_NONE bool "No low-level debugging UART" help Say Y here if your platform doesn't provide a UART option below. This relies on your platform choosing the right UART definition internally in order for low-level debugging to work. config DEBUG_ICEDCC bool "Kernel low-level debugging via EmbeddedICE DCC channel" help Say Y here if you want the debug print routines to direct their output to the EmbeddedICE macrocell's DCC channel using co-processor 14. This is known to work on the ARM9 style ICE channel and on the XScale with the PEEDI. Note that the system will appear to hang during boot if there is nothing connected to read from the DCC. config DEBUG_SEMIHOSTING bool "Kernel low-level debug output via semihosting I" help Semihosting enables code running on an ARM target to use the I/O facilities on a host debugger/emulator through a simple SVC calls. The host debugger or emulator must have semihosting enabled for the special svc call to be trapped otherwise the kernel will crash. This is known to work with OpenOCD, as wellas ARM's Fast Models, or any other controlling environment that implements semihosting. For more details about semihosting, please see chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. config AT91_DEBUG_LL_DBGU0 bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" depends on HAVE_AT91_DBGU0 Loading @@ -124,20 +89,6 @@ choice bool "Kernel low-level debugging on 9263, 9g45 and cap9" depends on HAVE_AT91_DBGU1 config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the 8250 at PCI COM1. config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the serial port in the DC21285 (Footbridge). config DEBUG_CLPS711X_UART1 bool "Kernel low-level debugging messages via UART1" depends on ARCH_CLPS711X Loading @@ -152,6 +103,20 @@ choice Say Y here if you want the debug print routines to direct their output to the second serial port on these devices. config DEBUG_DC21285_PORT bool "Kernel low-level debugging messages via footbridge serial port" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the serial port in the DC21285 (Footbridge). config DEBUG_FOOTBRIDGE_COM1 bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" depends on FOOTBRIDGE help Say Y here if you want the debug print routines to direct their output to the 8250 at PCI COM1. config DEBUG_HIGHBANK_UART bool "Kernel low-level debugging messages via Highbank UART" depends on ARCH_HIGHBANK Loading Loading @@ -222,6 +187,59 @@ choice Say Y here if you want kernel low-level debugging support on i.MX6Q. config DEBUG_MSM_UART1 bool "Kernel low-level debugging messages via MSM UART1" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the first serial port on MSM devices. config DEBUG_MSM_UART2 bool "Kernel low-level debugging messages via MSM UART2" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the second serial port on MSM devices. config DEBUG_MSM_UART3 bool "Kernel low-level debugging messages via MSM UART3" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the third serial port on MSM devices. config DEBUG_MSM8660_UART bool "Kernel low-level debugging messages via MSM 8660 UART" depends on ARCH_MSM8X60 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8660 devices. config DEBUG_MSM8960_UART bool "Kernel low-level debugging messages via MSM 8960 UART" depends on ARCH_MSM8960 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8960 devices. config DEBUG_REALVIEW_STD_PORT bool "RealView Default UART" depends on ARCH_REALVIEW help Say Y here if you want the debug print routines to direct their output to the serial port on RealView EB, PB11MP, PBA8 and PBX platforms. config DEBUG_REALVIEW_PB1176_PORT bool "RealView PB1176 UART" depends on MACH_REALVIEW_PB1176 help Say Y here if you want the debug print routines to direct their output to the standard serial port on the RealView PB1176 platform. config DEBUG_S3C_UART0 depends on PLAT_SAMSUNG bool "Use S3C UART 0 for low-level debug" Loading Loading @@ -255,58 +273,40 @@ choice The uncompressor code port configuration is now handled by CONFIG_S3C_LOWLEVEL_UART_PORT. config DEBUG_REALVIEW_STD_PORT bool "RealView Default UART" depends on ARCH_REALVIEW help Say Y here if you want the debug print routines to direct their output to the serial port on RealView EB, PB11MP, PBA8 and PBX platforms. config DEBUG_REALVIEW_PB1176_PORT bool "RealView PB1176 UART" depends on MACH_REALVIEW_PB1176 config DEBUG_LL_UART_NONE bool "No low-level debugging UART" help Say Y here if you want the debug print routines to direct their output to the standard serial port on the RealView PB1176 platform. Say Y here if your platform doesn't provide a UART option below. This relies on your platform choosing the right UART definition internally in order for low-level debugging to work. config DEBUG_MSM_UART1 bool "Kernel low-level debugging messages via MSM UART1" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 config DEBUG_ICEDCC bool "Kernel low-level debugging via EmbeddedICE DCC channel" help Say Y here if you want the debug print routines to direct their output to the first serial port on MSM devices. their output to the EmbeddedICE macrocell's DCC channel using co-processor 14. This is known to work on the ARM9 style ICE channel and on the XScale with the PEEDI. config DEBUG_MSM_UART2 bool "Kernel low-level debugging messages via MSM UART2" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 help Say Y here if you want the debug print routines to direct their output to the second serial port on MSM devices. Note that the system will appear to hang during boot if there is nothing connected to read from the DCC. config DEBUG_MSM_UART3 bool "Kernel low-level debugging messages via MSM UART3" depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 config DEBUG_SEMIHOSTING bool "Kernel low-level debug output via semihosting I" help Say Y here if you want the debug print routines to direct their output to the third serial port on MSM devices. Semihosting enables code running on an ARM target to use the I/O facilities on a host debugger/emulator through a simple SVC calls. The host debugger or emulator must have semihosting enabled for the special svc call to be trapped otherwise the kernel will crash. config DEBUG_MSM8660_UART bool "Kernel low-level debugging messages via MSM 8660 UART" depends on ARCH_MSM8X60 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8660 devices. This is known to work with OpenOCD, as wellas ARM's Fast Models, or any other controlling environment that implements semihosting. config DEBUG_MSM8960_UART bool "Kernel low-level debugging messages via MSM 8960 UART" depends on ARCH_MSM8960 select MSM_HAS_DEBUG_UART_HS help Say Y here if you want the debug print routines to direct their output to the serial port on MSM 8960 devices. For more details about semihosting, please see chapter 8 of DUI0203I_rvct_developer_guide.pdf from ARM Ltd. endchoice Loading
arch/arm/include/asm/hardware/it8152.h +3 −0 Original line number Diff line number Diff line Loading @@ -9,6 +9,9 @@ #ifndef __ASM_HARDWARE_IT8152_H #define __ASM_HARDWARE_IT8152_H #include <mach/irqs.h> extern void __iomem *it8152_base_address; #define IT8152_IO_BASE (it8152_base_address + 0x03e00000) Loading
arch/arm/include/asm/irq.h +6 −2 Original line number Diff line number Diff line #ifndef __ASM_ARM_IRQ_H #define __ASM_ARM_IRQ_H #define NR_IRQS_LEGACY 16 #ifndef CONFIG_SPARSE_IRQ #include <mach/irqs.h> #else #define NR_IRQS NR_IRQS_LEGACY #endif #ifndef irq_canonicalize #define irq_canonicalize(i) (i) #endif #define NR_IRQS_LEGACY 16 /* * Use this value to indicate lack of interrupt * capability Loading
arch/arm/include/asm/mc146818rtc.h +3 −1 Original line number Diff line number Diff line Loading @@ -5,7 +5,9 @@ #define _ASM_MC146818RTC_H #include <linux/io.h> #include <mach/irqs.h> #include <linux/kernel.h> #define RTC_IRQ BUILD_BUG_ON(1) #ifndef RTC_PORT #define RTC_PORT(x) (0x70 + (x)) Loading