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Commit a330b6f5 authored by Alexey Firago's avatar Alexey Firago Committed by Stephen Boyd
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clk: vc5: Add bindings for IDT VersaClock 5P49V5935 



IDT VersaClock 5 5P49V5935 has 4 clock outputs, 4 fractional dividers.
Input clock source can be taken from either integrated crystal or from
external reference clock.

Signed-off-by: default avatarAlexey Firago <alexey_firago@mentor.com>
Acked-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent 9adddb01
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