phy: exynos-mipi-video: Rewrite handling of phy registers
Controlling Exynos MIPI DPHY is done by handling 2 registers: one for phy reset and one for enabling it. This patch moves definitions of those 2 registers to speparate exynos_mipi_phy_desc structure, which can be defined separately for each PHY for each supported hardware variant. This code rewrite is needed to add support for newer Exynos SoCs, which have MIPI PHY related registers at different offsets or even different register regions. Acked-by:Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by:
Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com>
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