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Commit 82f4b67f authored by Ziyuan Xu's avatar Ziyuan Xu Committed by Heiko Stuebner
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clk: rockchip: fix wrong mmc sample phase shift for rk3328

mmc sample shift is 0 for RK3328 referring to the TRM.
So fix them.

Fixes: fe3511ad

 ("clk: rockchip: add clock controller for rk3328")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarZiyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: default avatarShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent c14d28e8
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