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Commit 51696d34 authored by Will Deacon's avatar Will Deacon
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arm64: tlb: Ensure we execute an ISB following walk cache invalidation

05f2d2f8 ("arm64: tlbflush: Introduce __flush_tlb_kernel_pgtable")
added a new TLB invalidation helper which is used when freeing
intermediate levels of page table used for kernel mappings, but is
missing the required ISB instruction after completion of the TLBI
instruction.

Add the missing barrier.

Cc: <stable@vger.kernel.org>
Fixes: 05f2d2f8

 ("arm64: tlbflush: Introduce __flush_tlb_kernel_pgtable")
Reviewed-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent d0b7a302
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