Commit fdaae351 authored by Richard Henderson's avatar Richard Henderson Committed by Cornelia Huck
Browse files

target/s390x: Finish implementing RISBGN 

We added the entry to insn-data.def, but failed to update op_risbg
to match.  No need to special-case the imask inversion, since that
is already ~0 for RISBG (and now RISBGN).

Fixes: 375ee58b
Fixes: https://bugs.launchpad.net/qemu/+bug/1701798

 (s390x part)
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-Id: <20171107145546.767-1-richard.henderson@linaro.org>
Reviewed-by: default avatarThomas Huth <thuth@redhat.com>
Tested-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarCornelia Huck <cohuck@redhat.com>
parent 2c28c490

target/s390x/translate.c

+3 −6
Original line number Diff line number Diff line
@@ -3432,6 +3432,7 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o) 
    /* Adjust the arguments for the specific insn.  */

    switch (s->fields->op2) {

    case 0x55: /* risbg */

    case 0x59: /* risbgn */

        i3 &= 63;

        i4 &= 63;

        pmask = ~0;
@@ -3447,7 +3448,7 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o) 
        pmask = 0x00000000ffffffffull;

        break;

    default:

        abort();

        g_assert_not_reached();

    }



    /* MASK is the set of bits to be inserted from R2.
@@ -3464,12 +3465,8 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o) 
       insns, we need to keep the other half of the register.  */

    imask = ~mask | ~pmask;

    if (do_zero) {

        if (s->fields->op2 == 0x55) {

            imask = 0;

        } else {

        imask = ~pmask;

    }

    }



    len = i4 - i3 + 1;

    pos = 63 - i4;