Commit f1fadbb2 authored Jul 15, 2019 by Aleksandar Markovic

target/mips: Add missing 'break' for certain cases of MFTR handling



This was found by GCC 8.3 static analysis.

Fixes: ead9360e

Reported-by: Stefan Weil <sw@weilnetz.de>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <1563220847-14630-4-git-send-email-aleksandar.markovic@rt-rk.com>

parent ab8c3410

target/mips/translate.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -9826,6 +9826,7 @@ static void gen_mftr(CPUMIPSState env, DisasContext ctx, int rt, int rd,
		gen_mfc0(ctx, t0, rt, sel);
		break;
		}
		break;
		case 12:
		switch (sel) {
		case 0:
		@@ -9835,6 +9836,7 @@ static void gen_mftr(CPUMIPSState env, DisasContext ctx, int rt, int rd,
		gen_mfc0(ctx, t0, rt, sel);
		break;
		}
		break;
		case 13:
		switch (sel) {
		case 0: