Commit ead9360e authored by Thiemo Seufer's avatar Thiemo Seufer
Browse files

Partial support for 34K multithreading, not functional yet. 


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
parent 606b41e7

cpu-exec.c

+1 −1
Original line number Diff line number Diff line
@@ -194,7 +194,7 @@ static inline TranslationBlock *tb_find_fast(void) 
#elif defined(TARGET_MIPS)

    flags = env->hflags & (MIPS_HFLAG_TMASK | MIPS_HFLAG_BMASK);

    cs_base = 0;

    pc = env->PC;

    pc = env->PC[env->current_tc];

#elif defined(TARGET_M68K)

    flags = (env->fpcr & M68K_FPCR_PREC)  /* Bit  6 */

            | (env->sr & SR_S)            /* Bit  13 */

gdbstub.c

+17 −17
Original line number Diff line number Diff line
@@ -559,17 +559,17 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) 
    ptr = mem_buf;

    for (i = 0; i < 32; i++)

      {

        *(target_ulong *)ptr = tswapl(env->gpr[i]);

        *(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);

        ptr += sizeof(target_ulong);

      }



    *(target_ulong *)ptr = tswapl(env->CP0_Status);

    ptr += sizeof(target_ulong);



    *(target_ulong *)ptr = tswapl(env->LO);

    *(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);

    ptr += sizeof(target_ulong);



    *(target_ulong *)ptr = tswapl(env->HI);

    *(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);

    ptr += sizeof(target_ulong);



    *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
@@ -578,21 +578,21 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf) 
    *(target_ulong *)ptr = tswapl(env->CP0_Cause);

    ptr += sizeof(target_ulong);



    *(target_ulong *)ptr = tswapl(env->PC);

    *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);

    ptr += sizeof(target_ulong);



    if (env->CP0_Config1 & (1 << CP0C1_FP))

      {

        for (i = 0; i < 32; i++)

          {

            *(target_ulong *)ptr = tswapl(env->fpr[i].fs[FP_ENDIAN_IDX]);

            *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].fs[FP_ENDIAN_IDX]);

            ptr += sizeof(target_ulong);

          }



        *(target_ulong *)ptr = tswapl(env->fcr31);

        *(target_ulong *)ptr = tswapl(env->fpu->fcr31);

        ptr += sizeof(target_ulong);



        *(target_ulong *)ptr = tswapl(env->fcr0);

        *(target_ulong *)ptr = tswapl(env->fpu->fcr0);

        ptr += sizeof(target_ulong);

      }
@@ -611,7 +611,7 @@ static unsigned int ieee_rm[] = 
    float_round_down

  };

#define RESTORE_ROUNDING_MODE \

    set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)

    set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)



static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)

{
@@ -621,17 +621,17 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) 
    ptr = mem_buf;

    for (i = 0; i < 32; i++)

      {

        env->gpr[i] = tswapl(*(target_ulong *)ptr);

        env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);

        ptr += sizeof(target_ulong);

      }



    env->CP0_Status = tswapl(*(target_ulong *)ptr);

    ptr += sizeof(target_ulong);



    env->LO = tswapl(*(target_ulong *)ptr);

    env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);

    ptr += sizeof(target_ulong);



    env->HI = tswapl(*(target_ulong *)ptr);

    env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);

    ptr += sizeof(target_ulong);



    env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
@@ -640,21 +640,21 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size) 
    env->CP0_Cause = tswapl(*(target_ulong *)ptr);

    ptr += sizeof(target_ulong);



    env->PC = tswapl(*(target_ulong *)ptr);

    env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);

    ptr += sizeof(target_ulong);



    if (env->CP0_Config1 & (1 << CP0C1_FP))

      {

        for (i = 0; i < 32; i++)

          {

            env->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);

            env->fpu->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);

            ptr += sizeof(target_ulong);

          }



        env->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;

        env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;

        ptr += sizeof(target_ulong);



        env->fcr0 = tswapl(*(target_ulong *)ptr);

        env->fpu->fcr0 = tswapl(*(target_ulong *)ptr);

        ptr += sizeof(target_ulong);



        /* set rounding mode */
@@ -775,7 +775,7 @@ static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) 
#elif defined (TARGET_SH4)

            env->pc = addr;

#elif defined (TARGET_MIPS)

            env->PC = addr;

            env->PC[env->current_tc] = addr;

#endif

        }

#ifdef CONFIG_USER_ONLY
@@ -799,7 +799,7 @@ static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf) 
#elif defined (TARGET_SH4)

            env->pc = addr;

#elif defined (TARGET_MIPS)

            env->PC = addr;

            env->PC[env->current_tc] = addr;

#endif

        }

        cpu_single_step(env, 1);

hw/mips_r4k.c

+1 −1
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ void load_kernel (CPUState *env, int ram_size, const char *kernel_filename, 
    if (kernel_size >= 0) {

        if ((entry & ~0x7fffffffULL) == 0x80000000)

            entry = (int32_t)entry;

        env->PC = entry;

        env->PC[env->current_tc] = entry;

    } else {

        fprintf(stderr, "qemu: could not load kernel '%s'\n",

                kernel_filename);

hw/mips_timer.c

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ uint32_t cpu_mips_get_random (CPUState *env) 
    static uint32_t seed = 0;

    uint32_t idx;

    seed = seed * 314159 + 1;

    idx = (seed >> 16) % (env->nb_tlb - env->CP0_Wired) + env->CP0_Wired;

    idx = (seed >> 16) % (env->tlb->nb_tlb - env->CP0_Wired) + env->CP0_Wired;

    return idx;

}

linux-user/main.c

+13 −11
Original line number Diff line number Diff line
@@ -1374,8 +1374,8 @@ void cpu_loop(CPUMIPSState *env) 
        trapnr = cpu_mips_exec(env);

        switch(trapnr) {

        case EXCP_SYSCALL:

            syscall_num = env->gpr[2] - 4000;

            env->PC += 4;

            syscall_num = env->gpr[2][env->current_tc] - 4000;

            env->PC[env->current_tc] += 4;

            if (syscall_num >= sizeof(mips_syscall_args)) {

                ret = -ENOSYS;

            } else {
@@ -1384,7 +1384,7 @@ void cpu_loop(CPUMIPSState *env) 
                target_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;



                nb_args = mips_syscall_args[syscall_num];

                sp_reg = env->gpr[29];

                sp_reg = env->gpr[29][env->current_tc];

                switch (nb_args) {

                /* these arguments are taken from the stack */

                case 8: arg8 = tgetl(sp_reg + 28);
@@ -1394,18 +1394,20 @@ void cpu_loop(CPUMIPSState *env) 
                default:

                    break;

                }

                ret = do_syscall(env, env->gpr[2],

                                 env->gpr[4], env->gpr[5],

                                 env->gpr[6], env->gpr[7],

                ret = do_syscall(env, env->gpr[2][env->current_tc],

                                 env->gpr[4][env->current_tc],

                                 env->gpr[5][env->current_tc],

                                 env->gpr[6][env->current_tc],

                                 env->gpr[7][env->current_tc],

                                 arg5, arg6/*, arg7, arg8*/);

            }

            if ((unsigned int)ret >= (unsigned int)(-1133)) {

                env->gpr[7] = 1; /* error flag */

                env->gpr[7][env->current_tc] = 1; /* error flag */

                ret = -ret;

            } else {

                env->gpr[7] = 0; /* error flag */

                env->gpr[7][env->current_tc] = 0; /* error flag */

            }

            env->gpr[2] = ret;

            env->gpr[2][env->current_tc] = ret;

            break;

        case EXCP_TLBL:

        case EXCP_TLBS:
@@ -2053,9 +2055,9 @@ int main(int argc, char **argv) 
        cpu_mips_register(env, def);



        for(i = 0; i < 32; i++) {

            env->gpr[i] = regs->regs[i];

            env->gpr[i][env->current_tc] = regs->regs[i];

        }

        env->PC = regs->cp0_epc;

        env->PC[env->current_tc] = regs->cp0_epc;

    }

#elif defined(TARGET_SH4)

    {