Commit ed3d90df authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20170210.0' into staging 



VFIO updates 2017-02-10

 - Fix GTT wrap-around for Skylake IGD assignment (Alex Williamson)
 - Tag vfio-pci-igd-lpc-bridge as bridge device category (Thomas Huth)
 - Don't build calxeda-xgmac or amd-xgbe except on ARM (Thomas Huth)

# gpg: Signature made Fri 10 Feb 2017 21:34:33 GMT
# gpg:                using RSA key 0x239B9B6E3BB08B22
# gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>"
# gpg:                 aka "Alex Williamson <alex@shazbot.org>"
# gpg:                 aka "Alex Williamson <alwillia@redhat.com>"
# gpg:                 aka "Alex Williamson <alex.l.williamson@gmail.com>"
# Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B  8A90 239B 9B6E 3BB0 8B22

* remotes/awilliam/tags/vfio-updates-20170210.0:
  hw/vfio: Add CONFIG switches for calxeda-xgmac and amd-xgbe
  hw/vfio/pci-quirks: Set category of the "vfio-pci-igd-lpc-bridge" device
  vfio-pci: Fix GTT wrap-around for Skylake+ IGD

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 6311b19b e197de50

default-configs/arm-softmmu.mak

+2 −0
Original line number Diff line number Diff line
@@ -95,6 +95,8 @@ CONFIG_VERSATILE_PCI=y 
CONFIG_VERSATILE_I2C=y



CONFIG_PCI_GENERIC=y

CONFIG_VFIO_XGMAC=y

CONFIG_VFIO_AMD_XGBE=y



CONFIG_SDHCI=y

CONFIG_INTEGRATOR_DEBUG=y

hw/vfio/Makefile.objs

+2 −2
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ ifeq ($(CONFIG_LINUX), y) 
obj-$(CONFIG_SOFTMMU) += common.o

obj-$(CONFIG_PCI) += pci.o pci-quirks.o

obj-$(CONFIG_SOFTMMU) += platform.o

obj-$(CONFIG_SOFTMMU) += calxeda-xgmac.o

obj-$(CONFIG_SOFTMMU) += amd-xgbe.o

obj-$(CONFIG_VFIO_XGMAC) += calxeda-xgmac.o

obj-$(CONFIG_VFIO_AMD_XGBE) += amd-xgbe.o

obj-$(CONFIG_SOFTMMU) += spapr.o

endif

hw/vfio/pci-quirks.c

+5 −1
Original line number Diff line number Diff line
@@ -1041,6 +1041,7 @@ static int igd_gen(VFIOPCIDevice *vdev) 
typedef struct VFIOIGDQuirk {

    struct VFIOPCIDevice *vdev;

    uint32_t index;

    uint32_t bdsm;

} VFIOIGDQuirk;



#define IGD_GMCH 0x50 /* Graphics Control Register */
@@ -1185,6 +1186,7 @@ static void vfio_pci_igd_lpc_bridge_class_init(ObjectClass *klass, void *data) 
    DeviceClass *dc = DEVICE_CLASS(klass);

    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);



    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);

    dc->desc = "VFIO dummy ISA/LPC bridge for IGD assignment";

    dc->hotpluggable = false;

    k->realize = vfio_pci_igd_lpc_bridge_realize;
@@ -1304,7 +1306,7 @@ static void vfio_igd_quirk_data_write(void *opaque, hwaddr addr, 
                         "BIOS reserved stolen memory.  Unsupported BIOS?");

            }



            val = base | (data & ((1 << 20) - 1));

            val = data - igd->bdsm + base;

        } else {

            val = 0; /* upper 32bits of pte, we only enable below 4G PTEs */

        }
@@ -1503,6 +1505,8 @@ static void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr) 
    igd = quirk->data = g_malloc0(sizeof(*igd));

    igd->vdev = vdev;

    igd->index = ~0;

    igd->bdsm = vfio_pci_read_config(&vdev->pdev, IGD_BDSM, 4);

    igd->bdsm &= ~((1 << 20) - 1); /* 1MB aligned */



    memory_region_init_io(&quirk->mem[0], OBJECT(vdev), &vfio_igd_index_quirk,

                          igd, "vfio-igd-index-quirk", 4);