Commit ec9466ff authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'afaerber/qom-cpu' into staging 



* afaerber/qom-cpu: (37 commits)
  kvm: Pass CPUState to kvm_on_sigbus_vcpu()
  cpu: Unconditionalize CPUState fields
  target-m68k: Use type_register() instead of type_register_static()
  target-unicore32: Use type_register() instead of type_register_static()
  target-openrisc: Use type_register() instead of type_register_static()
  target-unicore32: Catch attempt to instantiate abstract type in cpu_init()
  target-openrisc: Catch attempt to instantiate abstract type in cpu_init()
  target-m68k: Catch attempt to instantiate abstract type in cpu_init()
  target-arm: Catch attempt to instantiate abstract type in cpu_init()
  target-alpha: Catch attempt to instantiate abstract type in cpu_init()
  qom: Introduce object_class_is_abstract()
  target-unicore32: Detect attempt to instantiate non-CPU type in cpu_init()
  target-openrisc: Detect attempt to instantiate non-CPU type in cpu_init()
  target-m68k: Detect attempt to instantiate non-CPU type in cpu_init()
  target-alpha: Detect attempt to instantiate non-CPU type in cpu_init()
  target-arm: Detect attempt to instantiate non-CPU type in cpu_init()
  cpu: Add model resolution support to CPUClass
  target-i386: Remove setting tsc-frequency from x86_def_t
  target-i386: Set custom features/properties without intermediate x86_def_t
  target-i386: Remove vendor_override field from CPUX86State
  ...

Conflicts:
	tests/Makefile

Resolved simple conflict caused by lack of context in Makefile

Signed-off-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
parents 503cb22e 290adf38

cpus.c

+4 −4
Original line number Diff line number Diff line
@@ -517,7 +517,7 @@ static void qemu_init_sigbus(void) 
    prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);

}



static void qemu_kvm_eat_signals(CPUArchState *env)

static void qemu_kvm_eat_signals(CPUState *cpu)

{

    struct timespec ts = { 0, 0 };

    siginfo_t siginfo;
@@ -538,7 +538,7 @@ static void qemu_kvm_eat_signals(CPUArchState *env) 


        switch (r) {

        case SIGBUS:

            if (kvm_on_sigbus_vcpu(env, siginfo.si_code, siginfo.si_addr)) {

            if (kvm_on_sigbus_vcpu(cpu, siginfo.si_code, siginfo.si_addr)) {

                sigbus_reraise();

            }

            break;
@@ -560,7 +560,7 @@ static void qemu_init_sigbus(void) 
{

}



static void qemu_kvm_eat_signals(CPUArchState *env)

static void qemu_kvm_eat_signals(CPUState *cpu)

{

}

#endif /* !CONFIG_LINUX */
@@ -727,7 +727,7 @@ static void qemu_kvm_wait_io_event(CPUArchState *env) 
        qemu_cond_wait(cpu->halt_cond, &qemu_global_mutex);

    }



    qemu_kvm_eat_signals(env);

    qemu_kvm_eat_signals(cpu);

    qemu_wait_io_event_common(cpu);

}

hw/fw_cfg.c

+0 −1
Original line number Diff line number Diff line
@@ -504,7 +504,6 @@ FWCfgState *fw_cfg_init(uint32_t ctl_port, uint32_t data_port, 
    fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);

    fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)(display_type == DT_NOGRAPHIC));

    fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);

    fw_cfg_add_i16(s, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);

    fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu);

    fw_cfg_bootsplash(s);

    fw_cfg_reboot(s);

hw/pc.c

+35 −5
Original line number Diff line number Diff line
@@ -551,6 +551,18 @@ int e820_add_entry(uint64_t address, uint64_t length, uint32_t type) 
    return index;

}



/* Calculates the limit to CPU APIC ID values

 *

 * This function returns the limit for the APIC ID value, so that all

 * CPU APIC IDs are < pc_apic_id_limit().

 *

 * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().

 */

static unsigned int pc_apic_id_limit(unsigned int max_cpus)

{

    return x86_cpu_apic_id_from_index(max_cpus - 1) + 1;

}



static void *bochs_bios_init(void)

{

    void *fw_cfg;
@@ -558,9 +570,24 @@ static void *bochs_bios_init(void) 
    size_t smbios_len;

    uint64_t *numa_fw_cfg;

    int i, j;

    unsigned int apic_id_limit = pc_apic_id_limit(max_cpus);



    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);



    /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:

     *

     * SeaBIOS needs FW_CFG_MAX_CPUS for CPU hotplug, but the CPU hotplug

     * QEMU<->SeaBIOS interface is not based on the "CPU index", but on the APIC

     * ID of hotplugged CPUs[1]. This means that FW_CFG_MAX_CPUS is not the

     * "maximum number of CPUs", but the "limit to the APIC ID values SeaBIOS

     * may see".

     *

     * So, this means we must not use max_cpus, here, but the maximum possible

     * APIC ID value, plus one.

     *

     * [1] The only kind of "CPU identifier" used between SeaBIOS and QEMU is

     *     the APIC ID, not the "CPU index"

     */

    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)apic_id_limit);

    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);

    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);

    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
@@ -579,21 +606,24 @@ static void *bochs_bios_init(void) 
     * of nodes, one word for each VCPU->node and one word for each node to

     * hold the amount of memory.

     */

    numa_fw_cfg = g_new0(uint64_t, 1 + max_cpus + nb_numa_nodes);

    numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);

    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);

    for (i = 0; i < max_cpus; i++) {

        unsigned int apic_id = x86_cpu_apic_id_from_index(i);

        assert(apic_id < apic_id_limit);

        for (j = 0; j < nb_numa_nodes; j++) {

            if (test_bit(i, node_cpumask[j])) {

                numa_fw_cfg[i + 1] = cpu_to_le64(j);

                numa_fw_cfg[apic_id + 1] = cpu_to_le64(j);

                break;

            }

        }

    }

    for (i = 0; i < nb_numa_nodes; i++) {

        numa_fw_cfg[max_cpus + 1 + i] = cpu_to_le64(node_mem[i]);

        numa_fw_cfg[apic_id_limit + 1 + i] = cpu_to_le64(node_mem[i]);

    }

    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,

                     (1 + max_cpus + nb_numa_nodes) * sizeof(*numa_fw_cfg));

                     (1 + apic_id_limit + nb_numa_nodes) *

                     sizeof(*numa_fw_cfg));



    return fw_cfg;

}

hw/pc_piix.c

+19 −7
Original line number Diff line number Diff line
@@ -235,10 +235,18 @@ static void pc_init_pci(QEMUMachineInitArgs *args) 


static void pc_init_pci_1_3(QEMUMachineInitArgs *args)

{

    enable_kvm_pv_eoi();

    enable_compat_apic_id_mode();

    pc_init_pci(args);

}



/* PC machine init function for pc-0.14 to pc-1.2 */

static void pc_init_pci_1_2(QEMUMachineInitArgs *args)

{

    disable_kvm_pv_eoi();

    pc_init_pci_1_3(args);

}



/* PC init function for pc-0.10 to pc-0.13, and reused by xenfv */

static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args)

{

    ram_addr_t ram_size = args->ram_size;
@@ -247,6 +255,8 @@ static void pc_init_pci_no_kvmclock(QEMUMachineInitArgs *args) 
    const char *kernel_cmdline = args->kernel_cmdline;

    const char *initrd_filename = args->initrd_filename;

    const char *boot_device = args->boot_device;

    disable_kvm_pv_eoi();

    enable_compat_apic_id_mode();

    pc_init1(get_system_memory(),

             get_system_io(),

             ram_size, boot_device,
@@ -264,6 +274,8 @@ static void pc_init_isa(QEMUMachineInitArgs *args) 
    const char *boot_device = args->boot_device;

    if (cpu_model == NULL)

        cpu_model = "486";

    disable_kvm_pv_eoi();

    enable_compat_apic_id_mode();

    pc_init1(get_system_memory(),

             get_system_io(),

             ram_size, boot_device,
@@ -286,7 +298,7 @@ static QEMUMachine pc_i440fx_machine_v1_4 = { 
    .name = "pc-i440fx-1.4",

    .alias = "pc",

    .desc = "Standard PC (i440FX + PIIX, 1996)",

    .init = pc_init_pci_1_3,

    .init = pc_init_pci,

    .max_cpus = 255,

    .is_default = 1,

    DEFAULT_MACHINE_OPTIONS,
@@ -342,7 +354,7 @@ static QEMUMachine pc_machine_v1_3 = { 
static QEMUMachine pc_machine_v1_2 = {

    .name = "pc-1.2",

    .desc = "Standard PC",

    .init = pc_init_pci,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_1_2,
@@ -386,7 +398,7 @@ static QEMUMachine pc_machine_v1_2 = { 
static QEMUMachine pc_machine_v1_1 = {

    .name = "pc-1.1",

    .desc = "Standard PC",

    .init = pc_init_pci,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_1_1,
@@ -422,7 +434,7 @@ static QEMUMachine pc_machine_v1_1 = { 
static QEMUMachine pc_machine_v1_0 = {

    .name = "pc-1.0",

    .desc = "Standard PC",

    .init = pc_init_pci,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_1_0,
@@ -438,7 +450,7 @@ static QEMUMachine pc_machine_v1_0 = { 
static QEMUMachine pc_machine_v0_15 = {

    .name = "pc-0.15",

    .desc = "Standard PC",

    .init = pc_init_pci,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_0_15,
@@ -471,7 +483,7 @@ static QEMUMachine pc_machine_v0_15 = { 
static QEMUMachine pc_machine_v0_14 = {

    .name = "pc-0.14",

    .desc = "Standard PC",

    .init = pc_init_pci,

    .init = pc_init_pci_1_2,

    .max_cpus = 255,

    .compat_props = (GlobalProperty[]) {

        PC_COMPAT_0_14,

hw/ppc/mac_newworld.c

+1 −0
Original line number Diff line number Diff line
@@ -413,6 +413,7 @@ static void ppc_core99_init(QEMUMachineInitArgs *args) 
    /* No PCI init: the BIOS will do it */



    fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);

    fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);

    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);

    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);

    fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);