Commit dfa93a0b authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/rth/tags/pull-fpu-20180518' into staging 



Honor CPU_DUMP_FPU

# gpg: Signature made Fri 18 May 2018 22:56:12 BST
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-fpu-20180518:
  target/xtensa: Honor CPU_DUMP_FPU
  target/unicore32: Honor CPU_DUMP_FPU
  target/sparc: Honor CPU_DUMP_FPU
  target/s390x: Honor CPU_DUMP_FPU
  target/riscv: Honor CPU_DUMP_FPU
  target/ppc: Honor CPU_DUMP_FPU
  target/mips: Honor CPU_DUMP_FPU
  target/alpha: Honor CPU_DUMP_FPU

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 5bcf917e f29c0b17

target/alpha/helper.c

+8 −9
Original line number Diff line number Diff line
@@ -442,20 +442,19 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, 
    cpu_fprintf(f, "     PC  " TARGET_FMT_lx "      PS  %02x\n",

                env->pc, extract32(env->flags, ENV_FLAG_PS_SHIFT, 8));

    for (i = 0; i < 31; i++) {

        cpu_fprintf(f, "IR%02d %s " TARGET_FMT_lx " ", i,

                    linux_reg_names[i], cpu_alpha_load_gr(env, i));

        if ((i % 3) == 2)

            cpu_fprintf(f, "\n");

        cpu_fprintf(f, "IR%02d %s " TARGET_FMT_lx "%c", i,

                    linux_reg_names[i], cpu_alpha_load_gr(env, i),

                    (i % 3) == 2 ? '\n' : ' ');

    }



    cpu_fprintf(f, "lock_a   " TARGET_FMT_lx " lock_v   " TARGET_FMT_lx "\n",

                env->lock_addr, env->lock_value);



    if (flags & CPU_DUMP_FPU) {

        for (i = 0; i < 31; i++) {

        cpu_fprintf(f, "FIR%02d    " TARGET_FMT_lx " ", i,

                    *((uint64_t *)(&env->fir[i])));

        if ((i % 3) == 2)

            cpu_fprintf(f, "\n");

            cpu_fprintf(f, "FIR%02d    %016" PRIx64 "%c", i, env->fir[i],

                        (i % 3) == 2 ? '\n' : ' ');

        }

    }

    cpu_fprintf(f, "\n");

}

target/mips/translate.c

+2 −1
Original line number Diff line number Diff line
@@ -20446,9 +20446,10 @@ void mips_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, 
                env->CP0_Config2, env->CP0_Config3);

    cpu_fprintf(f, "    Config4 0x%08x Config5 0x%08x\n",

                env->CP0_Config4, env->CP0_Config5);

    if (env->hflags & MIPS_HFLAG_FPU)

    if ((flags & CPU_DUMP_FPU) && (env->hflags & MIPS_HFLAG_FPU)) {

        fpu_dump_state(env, f, cpu_fprintf, flags);

    }

}









void mips_tcg_init(void)









{

























target/ppc/translate.c



+13
−7






























Original line number
Diff line number
Diff line







@@ -7048,14 +7048,20 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,







    }









    cpu_fprintf(f, " ]             RES " TARGET_FMT_lx "\n",









                env->reserve_addr);



















    if (flags & CPU_DUMP_FPU) {









        for (i = 0; i < 32; i++) {









        if ((i & (RFPL - 1)) == 0)









            if ((i & (RFPL - 1)) == 0) {









                cpu_fprintf(f, "FPR%02d", i);









            }









            cpu_fprintf(f, " %016" PRIx64, *((uint64_t *)&env->fpr[i]));









        if ((i & (RFPL - 1)) == (RFPL - 1))









            if ((i & (RFPL - 1)) == (RFPL - 1)) {









                cpu_fprintf(f, "\n");









            }









        }









        cpu_fprintf(f, "FPSCR " TARGET_FMT_lx "\n", env->fpscr);









    }



















#if !defined(CONFIG_USER_ONLY)









    cpu_fprintf(f, " SRR0 " TARGET_FMT_lx "  SRR1 " TARGET_FMT_lx









                   "    PVR " TARGET_FMT_lx " VRSAVE " TARGET_FMT_lx "\n",
































target/riscv/cpu.c



+7
−5






























Original line number
Diff line number
Diff line







@@ -219,6 +219,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,







            cpu_fprintf(f, "\n");









        }









    }









    if (flags & CPU_DUMP_FPU) {









        for (i = 0; i < 32; i++) {









            cpu_fprintf(f, " %s %016" PRIx64,









                riscv_fpr_regnames[i], env->fpr[i]);








@@ -227,6 +228,7 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f,







            }









        }









    }









}



















static void riscv_cpu_set_pc(CPUState *cs, vaddr value)









{
































target/s390x/helper.c



+12
−11






























Original line number
Diff line number
Diff line







@@ -327,19 +327,20 @@ void s390_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf,







        }









    }



















    for (i = 0; i < 16; i++) {









        cpu_fprintf(f, "F%02d=%016" PRIx64, i, get_freg(env, i)->ll);









        if ((i % 4) == 3) {









            cpu_fprintf(f, "\n");









    if (flags & CPU_DUMP_FPU) {









        if (s390_has_feat(S390_FEAT_VECTOR)) {









            for (i = 0; i < 32; i++) {









                cpu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64 "%c",









                            i, env->vregs[i][0].ll, env->vregs[i][1].ll,









                            i % 2 ? '\n' : ' ');









            }









        } else {









            cpu_fprintf(f, " ");









            for (i = 0; i < 16; i++) {









                cpu_fprintf(f, "F%02d=%016" PRIx64 "%c",









                            i, get_freg(env, i)->ll,









                            (i % 4) == 3 ? '\n' : ' ');









            }









        }



















    for (i = 0; i < 32; i++) {









        cpu_fprintf(f, "V%02d=%016" PRIx64 "%016" PRIx64, i,









                    env->vregs[i][0].ll, env->vregs[i][1].ll);









        cpu_fprintf(f, (i % 2) ? "\n" : " ");









    }



















#ifndef CONFIG_USER_ONLY