Commit 5bcf917e authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20180518' into staging 



target-arm queue:
 * Initial part of SVE implementation (currently disabled)
 * smmuv3: fix some minor Coverity issues
 * add model of Xilinx ZynqMP generic DMA controller
 * expose (most) Arm coprocessor/system registers to
   gdb via QEMU's gdbstub, for reads only

# gpg: Signature made Fri 18 May 2018 18:18:27 BST
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20180518: (32 commits)
  target/arm: Implement SVE Permute - Extract Group
  target/arm: Implement SVE Integer Wide Immediate - Predicated Group
  target/arm: Implement SVE Bitwise Immediate Group
  target/arm: Implement SVE Element Count Group
  target/arm: Implement SVE floating-point trig select coefficient
  target/arm: Implement SVE floating-point exponential accelerator
  target/arm: Implement SVE Compute Vector Address Group
  target/arm: Implement SVE Bitwise Shift - Unpredicated Group
  target/arm: Implement SVE Stack Allocation Group
  target/arm: Implement SVE Index Generation Group
  target/arm: Implement SVE Integer Arithmetic - Unpredicated Group
  target/arm: Implement SVE Integer Multiply-Add Group
  target/arm: Implement SVE Integer Arithmetic - Unary Predicated Group
  target/arm: Implement SVE bitwise shift by wide elements (predicated)
  target/arm: Implement SVE bitwise shift by vector (predicated)
  target/arm: Implement SVE bitwise shift by immediate (predicated)
  target/arm: Implement SVE Integer Reduction Group
  target/arm: Implement SVE Integer Binary Arithmetic - Predicated Group
  target/arm: Implement SVE Predicate Misc Group
  target/arm: Implement SVE Predicate Logical Operations Group
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents d32e41a1 b94f8f60

.gitignore

+1 −0
Original line number Diff line number Diff line
@@ -206,3 +206,4 @@ trace-dtrace-root.h 
trace-dtrace-root.dtrace

trace-ust-all.h

trace-ust-all.c

/target/arm/decode-sve.inc.c

gdbstub.c

+10 −0
Original line number Diff line number Diff line
@@ -675,6 +675,16 @@ static const char *get_feature_xml(const char *p, const char **newp, 
        }

        return target_xml;

    }

    if (cc->gdb_get_dynamic_xml) {

        CPUState *cpu = first_cpu;

        char *xmlname = g_strndup(p, len);

        const char *xml = cc->gdb_get_dynamic_xml(cpu, xmlname);



        g_free(xmlname);

        if (xml) {

            return xml;

        }

    }

    for (i = 0; ; i++) {

        name = xml_builtin[i][0];

        if (!name || (strncmp(name, p, len) == 0 && strlen(name) == len))

hw/arm/smmu-common.c

+2 −2
Original line number Diff line number Diff line
@@ -83,9 +83,9 @@ static inline hwaddr get_table_pte_address(uint64_t pte, int granule_sz) 
static inline hwaddr get_block_pte_address(uint64_t pte, int level,

                                           int granule_sz, uint64_t *bsz)

{

    int n = (granule_sz - 3) * (4 - level) + 3;

    int n = level_shift(level, granule_sz);



    *bsz = 1 << n;

    *bsz = 1ULL << n;

    return PTE_ADDRESS(pte, n);

}

hw/arm/smmuv3.c

+1 −1
Original line number Diff line number Diff line
@@ -143,7 +143,7 @@ static MemTxResult smmuv3_write_eventq(SMMUv3State *s, Evt *evt) 


void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *info)

{

    Evt evt;

    Evt evt = {};

    MemTxResult r;



    if (!smmuv3_eventq_enabled(s)) {

hw/arm/xlnx-zynqmp.c

+53 −0
Original line number Diff line number Diff line
@@ -90,6 +90,24 @@ static const int spi_intr[XLNX_ZYNQMP_NUM_SPIS] = { 
    19, 20,

};



static const uint64_t gdma_ch_addr[XLNX_ZYNQMP_NUM_GDMA_CH] = {

    0xFD500000, 0xFD510000, 0xFD520000, 0xFD530000,

    0xFD540000, 0xFD550000, 0xFD560000, 0xFD570000

};



static const int gdma_ch_intr[XLNX_ZYNQMP_NUM_GDMA_CH] = {

    124, 125, 126, 127, 128, 129, 130, 131

};



static const uint64_t adma_ch_addr[XLNX_ZYNQMP_NUM_ADMA_CH] = {

    0xFFA80000, 0xFFA90000, 0xFFAA0000, 0xFFAB0000,

    0xFFAC0000, 0xFFAD0000, 0xFFAE0000, 0xFFAF0000

};



static const int adma_ch_intr[XLNX_ZYNQMP_NUM_ADMA_CH] = {

    77, 78, 79, 80, 81, 82, 83, 84

};



typedef struct XlnxZynqMPGICRegion {

    int region_index;

    uint32_t address;
@@ -197,6 +215,16 @@ static void xlnx_zynqmp_init(Object *obj) 


    object_initialize(&s->rtc, sizeof(s->rtc), TYPE_XLNX_ZYNQMP_RTC);

    qdev_set_parent_bus(DEVICE(&s->rtc), sysbus_get_default());



    for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {

        object_initialize(&s->gdma[i], sizeof(s->gdma[i]), TYPE_XLNX_ZDMA);

        qdev_set_parent_bus(DEVICE(&s->gdma[i]), sysbus_get_default());

    }



    for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {

        object_initialize(&s->adma[i], sizeof(s->adma[i]), TYPE_XLNX_ZDMA);

        qdev_set_parent_bus(DEVICE(&s->adma[i]), sysbus_get_default());

    }

}



static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
@@ -492,6 +520,31 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp) 
    }

    sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);

    sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);



    for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {

        object_property_set_uint(OBJECT(&s->gdma[i]), 128, "bus-width", &err);

        object_property_set_bool(OBJECT(&s->gdma[i]), true, "realized", &err);

        if (err) {

            error_propagate(errp, err);

            return;

        }



        sysbus_mmio_map(SYS_BUS_DEVICE(&s->gdma[i]), 0, gdma_ch_addr[i]);

        sysbus_connect_irq(SYS_BUS_DEVICE(&s->gdma[i]), 0,

                           gic_spi[gdma_ch_intr[i]]);

    }



    for (i = 0; i < XLNX_ZYNQMP_NUM_ADMA_CH; i++) {

        object_property_set_bool(OBJECT(&s->adma[i]), true, "realized", &err);

        if (err) {

            error_propagate(errp, err);

            return;

        }



        sysbus_mmio_map(SYS_BUS_DEVICE(&s->adma[i]), 0, adma_ch_addr[i]);

        sysbus_connect_irq(SYS_BUS_DEVICE(&s->adma[i]), 0,

                           gic_spi[adma_ch_intr[i]]);

    }

}



static Property xlnx_zynqmp_props[] = {