Commit d980fd59 authored by Peter Maydell's avatar Peter Maydell
Browse files

target-arm: A64: Add narrowing 2-reg-misc instructions 



Add the narrowing integer instructions in the 2-reg-misc class.

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarRichard Henderson <rth@twiddle.net>
parent 86cbc418

target-arm/translate-a64.c

+83 −2
Original line number Diff line number Diff line
@@ -75,6 +75,8 @@ typedef struct AArch64DecodeTable { 
/* Function prototype for gen_ functions for calling Neon helpers */

typedef void NeonGenTwoOpFn(TCGv_i32, TCGv_i32, TCGv_i32);

typedef void NeonGenTwoOpEnvFn(TCGv_i32, TCGv_ptr, TCGv_i32, TCGv_i32);

typedef void NeonGenNarrowFn(TCGv_i32, TCGv_i64);

typedef void NeonGenNarrowEnvFn(TCGv_i32, TCGv_ptr, TCGv_i64);



/* initialize TCG globals.  */

void a64_translate_init(void)
@@ -7371,6 +7373,79 @@ static void disas_simd_three_reg_same(DisasContext *s, uint32_t insn) 
    }

}



static void handle_2misc_narrow(DisasContext *s, int opcode, bool u, bool is_q,

                                int size, int rn, int rd)

{

    /* Handle 2-reg-misc ops which are narrowing (so each 2*size element

     * in the source becomes a size element in the destination).

     */

    int pass;

    TCGv_i32 tcg_res[2];

    int destelt = is_q ? 2 : 0;



    for (pass = 0; pass < 2; pass++) {

        TCGv_i64 tcg_op = tcg_temp_new_i64();

        NeonGenNarrowFn *genfn = NULL;

        NeonGenNarrowEnvFn *genenvfn = NULL;



        read_vec_element(s, tcg_op, rn, pass, MO_64);

        tcg_res[pass] = tcg_temp_new_i32();



        switch (opcode) {

        case 0x12: /* XTN, SQXTUN */

        {

            static NeonGenNarrowFn * const xtnfns[3] = {

                gen_helper_neon_narrow_u8,

                gen_helper_neon_narrow_u16,

                tcg_gen_trunc_i64_i32,

            };

            static NeonGenNarrowEnvFn * const sqxtunfns[3] = {

                gen_helper_neon_unarrow_sat8,

                gen_helper_neon_unarrow_sat16,

                gen_helper_neon_unarrow_sat32,

            };

            if (u) {

                genenvfn = sqxtunfns[size];

            } else {

                genfn = xtnfns[size];

            }

            break;

        }

        case 0x14: /* SQXTN, UQXTN */

        {

            static NeonGenNarrowEnvFn * const fns[3][2] = {

                { gen_helper_neon_narrow_sat_s8,

                  gen_helper_neon_narrow_sat_u8 },

                { gen_helper_neon_narrow_sat_s16,

                  gen_helper_neon_narrow_sat_u16 },

                { gen_helper_neon_narrow_sat_s32,

                  gen_helper_neon_narrow_sat_u32 },

            };

            genenvfn = fns[size][u];

            break;

        }

        default:

            g_assert_not_reached();

        }



        if (genfn) {

            genfn(tcg_res[pass], tcg_op);

        } else {

            genenvfn(tcg_res[pass], cpu_env, tcg_op);

        }



        tcg_temp_free_i64(tcg_op);

    }



    for (pass = 0; pass < 2; pass++) {

        write_vec_element_i32(s, tcg_res[pass], rd, destelt + pass, MO_32);

        tcg_temp_free_i32(tcg_res[pass]);

    }

    if (!is_q) {

        clear_vec_high(s, rd);

    }

}



/* C3.6.17 AdvSIMD two reg misc

 *   31  30  29 28       24 23  22 21       17 16    12 11 10 9    5 4    0

 * +---+---+---+-----------+------+-----------+--------+-----+------+------+
@@ -7405,11 +7480,17 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn) 
        }

        unallocated_encoding(s);

        return;

    case 0x12: /* XTN, XTN2, SQXTUN, SQXTUN2 */

    case 0x14: /* SQXTN, SQXTN2, UQXTN, UQXTN2 */

        if (size == 3) {

            unallocated_encoding(s);

            return;

        }

        handle_2misc_narrow(s, opcode, u, is_q, size, rn, rd);

        return;

    case 0x2: /* SADDLP, UADDLP */

    case 0x4: /* CLS, CLZ */

    case 0x6: /* SADALP, UADALP */

    case 0x12: /* XTN, XTN2, SQXTUN, SQXTUN2 */

    case 0x14: /* SQXTN, SQXTN2, UQXTN, UQXTN2 */

        if (size == 3) {

            unallocated_encoding(s);

            return;