Commit d0e25040 authored by Cédric Le Goater's avatar Cédric Le Goater Committed by Peter Maydell
Browse files

aspeed/smc: Introduce segment operations 



AST2600 will use a different encoding for the addresses defined in the
Segment Register.

Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Acked-by: default avatarJoel Stanley <joel@jms.id.au>
Message-id: 20190925143248.10000-13-clg@kaod.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 6b2b2a70

hw/ssi/aspeed_smc.c

+30 −15
Original line number Diff line number Diff line
@@ -211,6 +211,10 @@ static const AspeedSegments aspeed_segments_ast2500_spi2[] = { 
    { 0x38000000, 32 * 1024 * 1024 }, /* start address is readonly */

    { 0x3A000000, 96 * 1024 * 1024 }, /* end address is readonly */

};

static uint32_t aspeed_smc_segment_to_reg(const AspeedSMCState *s,

                                          const AspeedSegments *seg);

static void aspeed_smc_reg_to_segment(const AspeedSMCState *s, uint32_t reg,

                                      AspeedSegments *seg);



static const AspeedSMCController controllers[] = {

    {
@@ -226,6 +230,8 @@ static const AspeedSMCController controllers[] = { 
        .flash_window_size = 0x6000000,

        .has_dma           = false,

        .nregs             = ASPEED_SMC_R_SMC_MAX,

        .segment_to_reg    = aspeed_smc_segment_to_reg,

        .reg_to_segment    = aspeed_smc_reg_to_segment,

    }, {

        .name              = "aspeed.fmc-ast2400",

        .r_conf            = R_CONF,
@@ -241,6 +247,8 @@ static const AspeedSMCController controllers[] = { 
        .dma_flash_mask    = 0x0FFFFFFC,

        .dma_dram_mask     = 0x1FFFFFFC,

        .nregs             = ASPEED_SMC_R_MAX,

        .segment_to_reg    = aspeed_smc_segment_to_reg,

        .reg_to_segment    = aspeed_smc_reg_to_segment,

    }, {

        .name              = "aspeed.spi1-ast2400",

        .r_conf            = R_SPI_CONF,
@@ -254,6 +262,8 @@ static const AspeedSMCController controllers[] = { 
        .flash_window_size = 0x10000000,

        .has_dma           = false,

        .nregs             = ASPEED_SMC_R_SPI_MAX,

        .segment_to_reg    = aspeed_smc_segment_to_reg,

        .reg_to_segment    = aspeed_smc_reg_to_segment,

    }, {

        .name              = "aspeed.fmc-ast2500",

        .r_conf            = R_CONF,
@@ -269,6 +279,8 @@ static const AspeedSMCController controllers[] = { 
        .dma_flash_mask    = 0x0FFFFFFC,

        .dma_dram_mask     = 0x3FFFFFFC,

        .nregs             = ASPEED_SMC_R_MAX,

        .segment_to_reg    = aspeed_smc_segment_to_reg,

        .reg_to_segment    = aspeed_smc_reg_to_segment,

    }, {

        .name              = "aspeed.spi1-ast2500",

        .r_conf            = R_CONF,
@@ -282,6 +294,8 @@ static const AspeedSMCController controllers[] = { 
        .flash_window_size = 0x8000000,

        .has_dma           = false,

        .nregs             = ASPEED_SMC_R_MAX,

        .segment_to_reg    = aspeed_smc_segment_to_reg,

        .reg_to_segment    = aspeed_smc_reg_to_segment,

    }, {

        .name              = "aspeed.spi2-ast2500",

        .r_conf            = R_CONF,
@@ -295,19 +309,19 @@ static const AspeedSMCController controllers[] = { 
        .flash_window_size = 0x8000000,

        .has_dma           = false,

        .nregs             = ASPEED_SMC_R_MAX,

        .segment_to_reg    = aspeed_smc_segment_to_reg,

        .reg_to_segment    = aspeed_smc_reg_to_segment,

    },

};



/*

 * The Segment Register uses a 8MB unit to encode the start address

 * and the end address of the mapping window of a flash SPI slave :

 *

 *        | byte 1 | byte 2 | byte 3 | byte 4 |

 *        +--------+--------+--------+--------+

 *        |  end   |  start |   0    |   0    |

 *

 * The Segment Registers of the AST2400 and AST2500 have a 8MB

 * unit. The address range of a flash SPI slave is encoded with

 * absolute addresses which should be part of the overall controller

 * window.

 */

static inline uint32_t aspeed_smc_segment_to_reg(const AspeedSegments *seg)

static uint32_t aspeed_smc_segment_to_reg(const AspeedSMCState *s,

                                          const AspeedSegments *seg)

{

    uint32_t reg = 0;

    reg |= ((seg->addr >> 23) & SEG_START_MASK) << SEG_START_SHIFT;
@@ -315,7 +329,8 @@ static inline uint32_t aspeed_smc_segment_to_reg(const AspeedSegments *seg) 
    return reg;

}



static inline void aspeed_smc_reg_to_segment(uint32_t reg, AspeedSegments *seg)

static void aspeed_smc_reg_to_segment(const AspeedSMCState *s,

                                      uint32_t reg, AspeedSegments *seg)

{

    seg->addr = ((reg >> SEG_START_SHIFT) & SEG_START_MASK) << 23;

    seg->size = (((reg >> SEG_END_SHIFT) & SEG_END_MASK) << 23) - seg->addr;
@@ -333,7 +348,7 @@ static bool aspeed_smc_flash_overlap(const AspeedSMCState *s, 
            continue;

        }



        aspeed_smc_reg_to_segment(s->regs[R_SEG_ADDR0 + i], &seg);

        s->ctrl->reg_to_segment(s, s->regs[R_SEG_ADDR0 + i], &seg);



        if (new->addr + new->size > seg.addr &&

            new->addr < seg.addr + seg.size) {
@@ -354,7 +369,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs, 
    AspeedSMCFlash *fl = &s->flashes[cs];

    AspeedSegments seg;



    aspeed_smc_reg_to_segment(new, &seg);

    s->ctrl->reg_to_segment(s, new, &seg);



    /* The start address of CS0 is read-only */

    if (cs == 0 && seg.addr != s->ctrl->flash_window_base) {
@@ -362,7 +377,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs, 
                      "%s: Tried to change CS0 start address to 0x%"

                      HWADDR_PRIx "\n", s->ctrl->name, seg.addr);

        seg.addr = s->ctrl->flash_window_base;

        new = aspeed_smc_segment_to_reg(&seg);

        new = s->ctrl->segment_to_reg(s, &seg);

    }



    /*
@@ -379,7 +394,7 @@ static void aspeed_smc_flash_set_segment(AspeedSMCState *s, int cs, 
                      HWADDR_PRIx "\n", s->ctrl->name, cs, seg.addr + seg.size);

        seg.size = s->ctrl->segments[cs].addr + s->ctrl->segments[cs].size -

            seg.addr;

        new = aspeed_smc_segment_to_reg(&seg);

        new = s->ctrl->segment_to_reg(s, &seg);

    }



    /* Keep the segment in the overall flash window */
@@ -509,7 +524,7 @@ static uint32_t aspeed_smc_check_segment_addr(const AspeedSMCFlash *fl, 
    const AspeedSMCState *s = fl->controller;

    AspeedSegments seg;



    aspeed_smc_reg_to_segment(s->regs[R_SEG_ADDR0 + fl->id], &seg);

    s->ctrl->reg_to_segment(s, s->regs[R_SEG_ADDR0 + fl->id], &seg);

    if ((addr % seg.size) != addr) {

        qemu_log_mask(LOG_GUEST_ERROR,

                      "%s: invalid address 0x%08x for CS%d segment : "
@@ -769,7 +784,7 @@ static void aspeed_smc_reset(DeviceState *d) 
    /* setup default segment register values for all */

    for (i = 0; i < s->ctrl->max_slaves; ++i) {

        s->regs[R_SEG_ADDR0 + i] =

            aspeed_smc_segment_to_reg(&s->ctrl->segments[i]);

            s->ctrl->segment_to_reg(s, &s->ctrl->segments[i]);

    }



    /* HW strapping flash type for FMC controllers  */

include/hw/ssi/aspeed_smc.h

+4 −0
Original line number Diff line number Diff line
@@ -49,6 +49,10 @@ typedef struct AspeedSMCController { 
    hwaddr dma_flash_mask;

    hwaddr dma_dram_mask;

    uint32_t nregs;

    uint32_t (*segment_to_reg)(const struct AspeedSMCState *s,

                               const AspeedSegments *seg);

    void (*reg_to_segment)(const struct AspeedSMCState *s, uint32_t reg,

                           AspeedSegments *seg);

} AspeedSMCController;



typedef struct AspeedSMCFlash {