Commit cc0fec8a authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg/arm: Handle ctz and clz opcodes 



Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent 53c76c19

tcg/arm/tcg-target.h

+2 −2
Original line number Diff line number Diff line
@@ -110,8 +110,8 @@ extern bool use_idiv_instructions; 
#define TCG_TARGET_HAS_eqv_i32          0

#define TCG_TARGET_HAS_nand_i32         0

#define TCG_TARGET_HAS_nor_i32          0

#define TCG_TARGET_HAS_clz_i32          0

#define TCG_TARGET_HAS_ctz_i32          0

#define TCG_TARGET_HAS_clz_i32          use_armv5t_instructions

#define TCG_TARGET_HAS_ctz_i32          use_armv7_instructions

#define TCG_TARGET_HAS_deposit_i32      use_armv7_instructions

#define TCG_TARGET_HAS_extract_i32      use_armv7_instructions

#define TCG_TARGET_HAS_sextract_i32     use_armv7_instructions

tcg/arm/tcg-target.inc.c

+27 −0
Original line number Diff line number Diff line
@@ -256,6 +256,9 @@ typedef enum { 
    ARITH_BIC = 0xe << 21,

    ARITH_MVN = 0xf << 21,



    INSN_CLZ       = 0x016f0f10,

    INSN_RBIT      = 0x06ff0f30,



    INSN_LDR_IMM   = 0x04100000,

    INSN_LDR_REG   = 0x06100000,

    INSN_STR_IMM   = 0x04000000,
@@ -1829,6 +1832,28 @@ static inline void tcg_out_op(TCGContext *s, TCGOpcode opc, 
        }

        break;



    case INDEX_op_ctz_i32:

        tcg_out_dat_reg(s, COND_AL, INSN_RBIT, TCG_REG_TMP, 0, args[1], 0);

        a1 = TCG_REG_TMP;

        goto do_clz;



    case INDEX_op_clz_i32:

        a1 = args[1];

    do_clz:

        a0 = args[0];

        a2 = args[2];

        c = const_args[2];

        if (c && a2 == 32) {

            tcg_out_dat_reg(s, COND_AL, INSN_CLZ, a0, 0, a1, 0);

            break;

        }

        tcg_out_dat_imm(s, COND_AL, ARITH_CMP, 0, a1, 0);

        tcg_out_dat_reg(s, COND_NE, INSN_CLZ, a0, 0, a1, 0);

        if (c || a0 != a2) {

            tcg_out_dat_rIK(s, COND_EQ, ARITH_MOV, ARITH_MVN, a0, 0, a2, c);

        }

        break;



    case INDEX_op_brcond_i32:

        tcg_out_dat_rIN(s, COND_AL, ARITH_CMP, ARITH_CMN, 0,

                       args[0], args[1], const_args[1]);
@@ -1963,6 +1988,8 @@ static const TCGTargetOpDef arm_op_defs[] = { 
    { INDEX_op_sar_i32, { "r", "r", "ri" } },

    { INDEX_op_rotl_i32, { "r", "r", "ri" } },

    { INDEX_op_rotr_i32, { "r", "r", "ri" } },

    { INDEX_op_clz_i32, { "r", "r", "rIK" } },

    { INDEX_op_ctz_i32, { "r", "r", "rIK" } },



    { INDEX_op_brcond_i32, { "r", "rIN" } },

    { INDEX_op_setcond_i32, { "r", "r", "rIN" } },