Commit b96a54c7 authored by Alex Bennée's avatar Alex Bennée Committed by Peter Maydell
Browse files

arm/translate-a64: add FP16 FSQRT to simd_two_reg_misc_fp16 



Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20180227143852.11175-26-alex.bennee@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 98695028

target/arm/helper-a64.c

+13 −0
Original line number Diff line number Diff line
@@ -828,3 +828,16 @@ uint32_t HELPER(advsimd_f16touinth)(float16 a, void *fpstp) 
    }

    return float16_to_uint16(a, fpst);

}



/*

 * Square Root and Reciprocal square root

 */



float16 HELPER(sqrt_f16)(float16 a, void *fpstp)

{

    float_status *s = fpstp;



    return float16_sqrt(a, s);

}

target/arm/helper-a64.h

+1 −0
Original line number Diff line number Diff line
@@ -80,3 +80,4 @@ DEF_HELPER_2(advsimd_rinth_exact, f16, f16, ptr) 
DEF_HELPER_2(advsimd_rinth, f16, f16, ptr)

DEF_HELPER_2(advsimd_f16tosinth, i32, f16, ptr)

DEF_HELPER_2(advsimd_f16touinth, i32, f16, ptr)

DEF_HELPER_2(sqrt_f16, f16, f16, ptr)

target/arm/translate-a64.c

+5 −0
Original line number Diff line number Diff line
@@ -11388,6 +11388,8 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) 
    case 0x6f: /* FNEG */

        need_fpst = false;

        break;

    case 0x7f: /* FSQRT (vector) */

        break;

    default:

        fprintf(stderr, "%s: insn %#04x fpop %#2x\n", __func__, insn, fpop);

        g_assert_not_reached();
@@ -11502,6 +11504,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) 
            case 0x6f: /* FNEG */

                tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000);

                break;

            case 0x7f: /* FSQRT */

                gen_helper_sqrt_f16(tcg_res, tcg_op, tcg_fpstatus);

                break;

            default:

                g_assert_not_reached();

            }