Commit 98695028 authored by Alex Bennée's avatar Alex Bennée Committed by Peter Maydell
Browse files

arm/translate-a64: add FP16 FRCPX to simd_two_reg_misc_fp16 



We go with the localised helper.

Signed-off-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Message-id: 20180227143852.11175-25-alex.bennee@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent fbd06e1e

target/arm/helper-a64.c

+29 −0
Original line number Diff line number Diff line
@@ -356,6 +356,35 @@ uint64_t HELPER(neon_addlp_u16)(uint64_t a) 
}



/* Floating-point reciprocal exponent - see FPRecpX in ARM ARM */

float16 HELPER(frecpx_f16)(float16 a, void *fpstp)

{

    float_status *fpst = fpstp;

    uint16_t val16, sbit;

    int16_t exp;



    if (float16_is_any_nan(a)) {

        float16 nan = a;

        if (float16_is_signaling_nan(a, fpst)) {

            float_raise(float_flag_invalid, fpst);

            nan = float16_maybe_silence_nan(a, fpst);

        }

        if (fpst->default_nan_mode) {

            nan = float16_default_nan(fpst);

        }

        return nan;

    }



    val16 = float16_val(a);

    sbit = 0x8000 & val16;

    exp = extract32(val16, 10, 5);



    if (exp == 0) {

        return make_float16(deposit32(sbit, 10, 5, 0x1e));

    } else {

        return make_float16(deposit32(sbit, 10, 5, ~exp));

    }

}



float32 HELPER(frecpx_f32)(float32 a, void *fpstp)

{

    float_status *fpst = fpstp;

target/arm/helper-a64.h

+1 −0
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ DEF_HELPER_FLAGS_1(neon_addlp_s16, TCG_CALL_NO_RWG_SE, i64, i64) 
DEF_HELPER_FLAGS_1(neon_addlp_u16, TCG_CALL_NO_RWG_SE, i64, i64)

DEF_HELPER_FLAGS_2(frecpx_f64, TCG_CALL_NO_RWG, f64, f64, ptr)

DEF_HELPER_FLAGS_2(frecpx_f32, TCG_CALL_NO_RWG, f32, f32, ptr)

DEF_HELPER_FLAGS_2(frecpx_f16, TCG_CALL_NO_RWG, f16, f16, ptr)

DEF_HELPER_FLAGS_2(fcvtx_f64_to_f32, TCG_CALL_NO_RWG, f32, f64, env)

DEF_HELPER_FLAGS_3(crc32_64, TCG_CALL_NO_RWG_SE, i64, i64, i64, i32)

DEF_HELPER_FLAGS_3(crc32c_64, TCG_CALL_NO_RWG_SE, i64, i64, i64, i32)

target/arm/translate-a64.c

+4 −0
Original line number Diff line number Diff line
@@ -11312,6 +11312,7 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) 
        handle_2misc_fcmp_zero(s, fpop, is_scalar, 0, is_q, MO_16, rn, rd);

        return;

    case 0x3d: /* FRECPE */

    case 0x3f: /* FRECPX */

        break;

    case 0x18: /* FRINTN */

        need_rmode = true;
@@ -11436,6 +11437,9 @@ static void disas_simd_two_reg_misc_fp16(DisasContext *s, uint32_t insn) 
        case 0x3d: /* FRECPE */

            gen_helper_recpe_f16(tcg_res, tcg_op, tcg_fpstatus);

            break;

        case 0x3f: /* FRECPX */

            gen_helper_frecpx_f16(tcg_res, tcg_op, tcg_fpstatus);

            break;

        case 0x5a: /* FCVTNU */

        case 0x5b: /* FCVTMU */

        case 0x5c: /* FCVTAU */