Loading target/ppc/int_helper.c +39 −31 Original line number Diff line number Diff line Loading @@ -137,7 +137,8 @@ uint64_t helper_divde(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32_t oe) /* if x = 0xab, returns 0xababababababababa */ #define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff)) /* substract 1 from each byte, and with inverse, check if MSB is set at each /* * subtract 1 from each byte, and with inverse, check if MSB is set at each * byte. * i.e. ((0x00 - 0x01) & ~(0x00)) & 0x80 * (0xFF & 0xFF) & 0x80 = 0x80 (zero found) Loading @@ -156,7 +157,8 @@ uint32_t helper_cmpeqb(target_ulong ra, target_ulong rb) #undef haszero #undef hasvalue /* Return invalid random number. /* * Return invalid random number. * * FIXME: Add rng backend or other mechanism to get cryptographically suitable * random number Loading Loading @@ -370,7 +372,8 @@ target_ulong helper_divso(CPUPPCState *env, target_ulong arg1, /* 602 specific instructions */ /* mfrom is the most crazy instruction ever seen, imho ! */ /* Real implementation uses a ROM table. Do the same */ /* Extremely decomposed: /* * Extremely decomposed: * -arg / 256 * return 256 * log10(10 + 1.0) + 0.5 */ Loading Loading @@ -634,7 +637,8 @@ void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ } \ } /* VABSDU - Vector absolute difference unsigned /* * VABSDU - Vector absolute difference unsigned * name - instruction mnemonic suffix (b: byte, h: halfword, w: word) * element - element type to access from vector */ Loading Loading @@ -739,7 +743,8 @@ void helper_vcmpne##suffix(CPUPPCState *env, ppc_avr_t *r, \ } \ } /* VCMPNEZ - Vector compare not equal to zero /* * VCMPNEZ - Vector compare not equal to zero * suffix - instruction mnemonic suffix (b: byte, h: halfword, w: word) * element - element type to access from vector */ Loading Loading @@ -1736,9 +1741,11 @@ VEXTU_X_DO(vextuhrx, 16, 0) VEXTU_X_DO(vextuwrx, 32, 0) #undef VEXTU_X_DO /* The specification says that the results are undefined if all of the * shift counts are not identical. We check to make sure that they are * to conform to what real hardware appears to do. */ /* * The specification says that the results are undefined if all of the * shift counts are not identical. We check to make sure that they * are to conform to what real hardware appears to do. */ #define VSHIFT(suffix, leftp) \ void helper_vs##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ Loading Loading @@ -1805,9 +1812,10 @@ void helper_vsrv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) int i; unsigned int shift, bytes; /* Use reverse order, as destination and source register can be same. Its * being modified in place saving temporary, reverse order will guarantee * that computed result is not fed back. /* * Use reverse order, as destination and source register can be * same. Its being modified in place saving temporary, reverse * order will guarantee that computed result is not fed back. */ for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) { shift = b->u8[i] & 0x7; /* extract shift value */ Loading Loading
target/ppc/int_helper.c +39 −31 Original line number Diff line number Diff line Loading @@ -137,7 +137,8 @@ uint64_t helper_divde(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32_t oe) /* if x = 0xab, returns 0xababababababababa */ #define pattern(x) (((x) & 0xff) * (~(target_ulong)0 / 0xff)) /* substract 1 from each byte, and with inverse, check if MSB is set at each /* * subtract 1 from each byte, and with inverse, check if MSB is set at each * byte. * i.e. ((0x00 - 0x01) & ~(0x00)) & 0x80 * (0xFF & 0xFF) & 0x80 = 0x80 (zero found) Loading @@ -156,7 +157,8 @@ uint32_t helper_cmpeqb(target_ulong ra, target_ulong rb) #undef haszero #undef hasvalue /* Return invalid random number. /* * Return invalid random number. * * FIXME: Add rng backend or other mechanism to get cryptographically suitable * random number Loading Loading @@ -370,7 +372,8 @@ target_ulong helper_divso(CPUPPCState *env, target_ulong arg1, /* 602 specific instructions */ /* mfrom is the most crazy instruction ever seen, imho ! */ /* Real implementation uses a ROM table. Do the same */ /* Extremely decomposed: /* * Extremely decomposed: * -arg / 256 * return 256 * log10(10 + 1.0) + 0.5 */ Loading Loading @@ -634,7 +637,8 @@ void helper_v##name(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ } \ } /* VABSDU - Vector absolute difference unsigned /* * VABSDU - Vector absolute difference unsigned * name - instruction mnemonic suffix (b: byte, h: halfword, w: word) * element - element type to access from vector */ Loading Loading @@ -739,7 +743,8 @@ void helper_vcmpne##suffix(CPUPPCState *env, ppc_avr_t *r, \ } \ } /* VCMPNEZ - Vector compare not equal to zero /* * VCMPNEZ - Vector compare not equal to zero * suffix - instruction mnemonic suffix (b: byte, h: halfword, w: word) * element - element type to access from vector */ Loading Loading @@ -1736,9 +1741,11 @@ VEXTU_X_DO(vextuhrx, 16, 0) VEXTU_X_DO(vextuwrx, 32, 0) #undef VEXTU_X_DO /* The specification says that the results are undefined if all of the * shift counts are not identical. We check to make sure that they are * to conform to what real hardware appears to do. */ /* * The specification says that the results are undefined if all of the * shift counts are not identical. We check to make sure that they * are to conform to what real hardware appears to do. */ #define VSHIFT(suffix, leftp) \ void helper_vs##suffix(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) \ { \ Loading Loading @@ -1805,9 +1812,10 @@ void helper_vsrv(ppc_avr_t *r, ppc_avr_t *a, ppc_avr_t *b) int i; unsigned int shift, bytes; /* Use reverse order, as destination and source register can be same. Its * being modified in place saving temporary, reverse order will guarantee * that computed result is not fed back. /* * Use reverse order, as destination and source register can be * same. Its being modified in place saving temporary, reverse * order will guarantee that computed result is not fed back. */ for (i = ARRAY_SIZE(r->u8) - 1; i >= 0; i--) { shift = b->u8[i] & 0x7; /* extract shift value */ Loading