Commit ab87a66f authored by Richard Henderson's avatar Richard Henderson
Browse files

tcg/ppc: Implement INDEX_op_rot[lr]v_vec 



We already had support for rotlv, using a target-specific opcode;
convert to use the generic opcode.  Handle rotrv via simple negation.

Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
parent 7cff8988

tcg/ppc/tcg-target.h

+1 −1
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ extern bool have_vsx; 
#define TCG_TARGET_HAS_abs_vec          0

#define TCG_TARGET_HAS_roti_vec         0

#define TCG_TARGET_HAS_rots_vec         0

#define TCG_TARGET_HAS_rotv_vec         0

#define TCG_TARGET_HAS_rotv_vec         1

#define TCG_TARGET_HAS_shi_vec          0

#define TCG_TARGET_HAS_shs_vec          0

#define TCG_TARGET_HAS_shv_vec          1

tcg/ppc/tcg-target.inc.c

+19 −4
Original line number Diff line number Diff line
@@ -2995,6 +2995,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) 
    case INDEX_op_shlv_vec:

    case INDEX_op_shrv_vec:

    case INDEX_op_sarv_vec:

    case INDEX_op_rotlv_vec:

        return vece <= MO_32 || have_isa_2_07;

    case INDEX_op_ssadd_vec:

    case INDEX_op_sssub_vec:
@@ -3005,6 +3006,7 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) 
    case INDEX_op_shli_vec:

    case INDEX_op_shri_vec:

    case INDEX_op_sari_vec:

    case INDEX_op_rotli_vec:

        return vece <= MO_32 || have_isa_2_07 ? -1 : 0;

    case INDEX_op_neg_vec:

        return vece >= MO_32 && have_isa_3_00;
@@ -3019,6 +3021,8 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece) 
        return 0;

    case INDEX_op_bitsel_vec:

        return have_vsx;

    case INDEX_op_rotrv_vec:

        return -1;

    default:

        return 0;

    }
@@ -3301,7 +3305,7 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc, 
    case INDEX_op_ppc_pkum_vec:

        insn = pkum_op[vece];

        break;

    case INDEX_op_ppc_rotl_vec:

    case INDEX_op_rotlv_vec:

        insn = rotl_op[vece];

        break;

    case INDEX_op_ppc_msum_vec:
@@ -3409,7 +3413,7 @@ static void expand_vec_mul(TCGType type, unsigned vece, TCGv_vec v0, 
        t3 = tcg_temp_new_vec(type);

        t4 = tcg_temp_new_vec(type);

        tcg_gen_dupi_vec(MO_8, t4, -16);

        vec_gen_3(INDEX_op_ppc_rotl_vec, type, MO_32, tcgv_vec_arg(t1),

        vec_gen_3(INDEX_op_rotlv_vec, type, MO_32, tcgv_vec_arg(t1),

                  tcgv_vec_arg(v2), tcgv_vec_arg(t4));

        vec_gen_3(INDEX_op_ppc_mulou_vec, type, MO_16, tcgv_vec_arg(t2),

                  tcgv_vec_arg(v1), tcgv_vec_arg(v2));
@@ -3434,7 +3438,7 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece, 
                       TCGArg a0, ...)

{

    va_list va;

    TCGv_vec v0, v1, v2;

    TCGv_vec v0, v1, v2, t0;

    TCGArg a2;



    va_start(va, a0);
@@ -3452,6 +3456,9 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece, 
    case INDEX_op_sari_vec:

        expand_vec_shi(type, vece, v0, v1, a2, INDEX_op_sarv_vec);

        break;

    case INDEX_op_rotli_vec:

        expand_vec_shi(type, vece, v0, v1, a2, INDEX_op_rotlv_vec);

        break;

    case INDEX_op_cmp_vec:

        v2 = temp_tcgv_vec(arg_temp(a2));

        expand_vec_cmp(type, vece, v0, v1, v2, va_arg(va, TCGArg));
@@ -3460,6 +3467,13 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece, 
        v2 = temp_tcgv_vec(arg_temp(a2));

        expand_vec_mul(type, vece, v0, v1, v2);

        break;

    case INDEX_op_rotlv_vec:

        v2 = temp_tcgv_vec(arg_temp(a2));

        t0 = tcg_temp_new_vec(type);

        tcg_gen_neg_vec(vece, t0, v2);

        tcg_gen_rotlv_vec(vece, v0, v1, t0);

        tcg_temp_free_vec(t0);

        break;

    default:

        g_assert_not_reached();

    }
@@ -3664,12 +3678,13 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode op) 
    case INDEX_op_shlv_vec:

    case INDEX_op_shrv_vec:

    case INDEX_op_sarv_vec:

    case INDEX_op_rotlv_vec:

    case INDEX_op_rotrv_vec:

    case INDEX_op_ppc_mrgh_vec:

    case INDEX_op_ppc_mrgl_vec:

    case INDEX_op_ppc_muleu_vec:

    case INDEX_op_ppc_mulou_vec:

    case INDEX_op_ppc_pkum_vec:

    case INDEX_op_ppc_rotl_vec:

    case INDEX_op_dup2_vec:

        return &v_v_v;

    case INDEX_op_not_vec:

tcg/ppc/tcg-target.opc.h

+0 −1
Original line number Diff line number Diff line
@@ -30,4 +30,3 @@ DEF(ppc_msum_vec, 1, 3, 0, IMPLVEC) 
DEF(ppc_muleu_vec, 1, 2, 0, IMPLVEC)

DEF(ppc_mulou_vec, 1, 2, 0, IMPLVEC)

DEF(ppc_pkum_vec, 1, 2, 0, IMPLVEC)
 
DEF(ppc_rotl_vec, 1, 2, 0, IMPLVEC)