Commit a8766e31 authored by Richard Henderson's avatar Richard Henderson Committed by Peter Maydell
Browse files

target/arm: Tidy condition in disas_simd_two_reg_misc 



Path analysis shows that size == 3 && !is_q has been eliminated.

Fixes: Coverity CID1385853
Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Reviewed-by: default avatarAlex Bennée <alex.bennee@linaro.org>
Message-id: 20180501180455.11214-3-richard.henderson@linaro.org
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 8dae4697

target/arm/translate-a64.c

+5 −1
Original line number Diff line number Diff line
@@ -11473,7 +11473,11 @@ static void disas_simd_two_reg_misc(DisasContext *s, uint32_t insn) 
        /* All 64-bit element operations can be shared with scalar 2misc */

        int pass;



        for (pass = 0; pass < (is_q ? 2 : 1); pass++) {

        /* Coverity claims (size == 3 && !is_q) has been eliminated

         * from all paths leading to here.

         */

        tcg_debug_assert(is_q);

        for (pass = 0; pass < 2; pass++) {

            TCGv_i64 tcg_op = tcg_temp_new_i64();

            TCGv_i64 tcg_res = tcg_temp_new_i64();