Commit 9da8ac32 authored by John Snow's avatar John Snow
Browse files

ahci: make mem_read_32 traces more descriptive 



Signed-off-by: default avatarJohn Snow <jsnow@redhat.com>
Reviewed-by: default avatarPhilippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20180531222835.16558-13-jsnow@redhat.com
Signed-off-by: default avatarJohn Snow <jsnow@redhat.com>
parent 215c41aa

hw/ide/ahci.c

+5 −2
Original line number Diff line number Diff line
@@ -47,7 +47,6 @@ static bool ahci_map_fis_address(AHCIDevice *ad); 
static void ahci_unmap_clb_address(AHCIDevice *ad);

static void ahci_unmap_fis_address(AHCIDevice *ad);



__attribute__((__unused__)) /* TODO */

static const char *AHCIHostReg_lookup[AHCI_HOST_REG__COUNT] = {

    [AHCI_HOST_REG_CAP]        = "CAP",

    [AHCI_HOST_REG_CTL]        = "GHC",
@@ -406,13 +405,17 @@ static uint64_t ahci_mem_read_32(void *opaque, hwaddr addr) 
            val = s->control_regs.version;

            break;

        default:

            break;

            trace_ahci_mem_read_32_host_default(s, AHCIHostReg_lookup[regnum],

                                                addr);

        }

        trace_ahci_mem_read_32_host(s, AHCIHostReg_lookup[regnum], addr, val);

    } else if ((addr >= AHCI_PORT_REGS_START_ADDR) &&

               (addr < (AHCI_PORT_REGS_START_ADDR +

                (s->ports * AHCI_PORT_ADDR_OFFSET_LEN)))) {

        val = ahci_port_read(s, (addr - AHCI_PORT_REGS_START_ADDR) >> 7,

                             addr & AHCI_PORT_ADDR_OFFSET_MASK);

    } else {

        trace_ahci_mem_read_32_default(s, addr, val);

    }



    trace_ahci_mem_read_32(s, addr, val);

hw/ide/trace-events

+3 −0
Original line number Diff line number Diff line
@@ -72,6 +72,9 @@ ahci_trigger_irq(void *s, int port, const char *name, uint32_t val, uint32_t old 
ahci_port_write(void *s, int port, const char *reg, int offset, uint32_t val) "ahci(%p)[%d]: port write [reg:%s] @ 0x%x: 0x%08x"

ahci_port_write_unimpl(void *s, int port, const char *reg, int offset, uint32_t val) "ahci(%p)[%d]: unimplemented port write [reg:%s] @ 0x%x: 0x%08x"

ahci_mem_read_32(void *s, uint64_t addr, uint32_t val) "ahci(%p): mem read @ 0x%"PRIx64": 0x%08x"

ahci_mem_read_32_default(void *s, uint64_t addr, uint32_t val) "ahci(%p): mem read @ 0x%"PRIx64": 0x%08x"

ahci_mem_read_32_host(void *s, const char *reg, uint64_t addr, uint32_t val) "ahci(%p): mem read [reg:%s] @ 0x%"PRIx64": 0x%08x"

ahci_mem_read_32_host_default(void *s, const char *reg, uint64_t addr) "ahci(%p): unimplemented mem read [reg:%s] @ 0x%"PRIx64

ahci_mem_read(void *s, unsigned size, uint64_t addr, uint64_t val) "ahci(%p): read%u @ 0x%"PRIx64": 0x%016"PRIx64

ahci_mem_write(void *s, unsigned size, uint64_t addr, uint64_t val) "ahci(%p): write%u @ 0x%"PRIx64": 0x%016"PRIx64

ahci_mem_write_unknown(void *s, unsigned size, uint64_t addr, uint64_t val) "ahci(%p): write%u to unknown register 0x%"PRIx64": 0x%016"PRIx64