Commit 98e139bc authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-feb-21-2019-v2' into staging 



MIPS queue for February 21st, 2019, v2

# gpg: Signature made Thu 21 Feb 2019 18:37:04 GMT
# gpg:                using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01  DD75 D497 2A89 67F7 5A65

* remotes/amarkovic/tags/mips-queue-feb-21-2019-v2:
  target/mips: fulong2e: Dynamically generate SPD EEPROM data
  target/mips: fulong2e: Fix bios flash size
  hw/pci-host/bonito.c: Add PCI mem region mapped at the correct address
  target/mips: implement QMP query-cpu-definitions command
  tests/tcg: target/mips: Add wrappers for MSA integer compare instructions
  tests/tcg: target/mips: Change directory name 'bit-counting' to 'bit-count'
  tests/tcg: target/mips: Correct path to headers in some test source files
  hw/misc: mips_itu: Fix 32/64 bit issue in a line involving shift operator

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents faf840a3 fb1b0fcc

hw/mips/mips_fulong2e.c

+17 −23
Original line number Diff line number Diff line
@@ -21,6 +21,7 @@ 
#include "qemu/osdep.h"

#include "qemu/units.h"

#include "qapi/error.h"

#include "cpu.h"

#include "hw/hw.h"

#include "hw/i386/pc.h"

#include "hw/dma/i8257.h"
@@ -35,7 +36,6 @@ 
#include "audio/audio.h"

#include "qemu/log.h"

#include "hw/loader.h"

#include "hw/mips/bios.h"

#include "hw/ide.h"

#include "elf.h"

#include "hw/isa/vt82c686.h"
@@ -51,6 +51,8 @@ 
#define ENVP_NB_ENTRIES	 	16

#define ENVP_ENTRY_SIZE	 	256



/* fulong 2e has a 512k flash: Winbond W39L040AP70Z */

#define BIOS_SIZE (512 * KiB)

#define MAX_IDE_BUS 2



/*
@@ -212,20 +214,6 @@ static void main_cpu_reset(void *opaque) 
    }

}



static const uint8_t eeprom_spd[0x80] = {

    0x80,0x08,0x07,0x0d,0x09,0x02,0x40,0x00,0x04,0x70,

    0x70,0x00,0x82,0x10,0x00,0x01,0x0e,0x04,0x0c,0x01,

    0x02,0x20,0x80,0x75,0x70,0x00,0x00,0x50,0x3c,0x50,

    0x2d,0x20,0xb0,0xb0,0x50,0x50,0x00,0x00,0x00,0x00,

    0x00,0x41,0x48,0x3c,0x32,0x75,0x00,0x00,0x00,0x00,

    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,

    0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,

    0x00,0x00,0x00,0x9c,0x7b,0x07,0x00,0x00,0x00,0x00,

    0x00,0x00,0x00,0x00,0x48,0x42,0x35,0x34,0x41,0x32,

    0x35,0x36,0x38,0x4b,0x4e,0x2d,0x41,0x37,0x35,0x42,

    0x20,0x30,0x20

};



static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,

                                       I2CBus **i2c_bus, ISABus **p_isa_bus)

{
@@ -282,7 +270,6 @@ static void network_init (PCIBus *pci_bus) 


static void mips_fulong2e_init(MachineState *machine)

{

    ram_addr_t ram_size = machine->ram_size;

    const char *kernel_filename = machine->kernel_filename;

    const char *kernel_cmdline = machine->kernel_cmdline;

    const char *initrd_filename = machine->initrd_filename;
@@ -290,7 +277,10 @@ static void mips_fulong2e_init(MachineState *machine) 
    MemoryRegion *address_space_mem = get_system_memory();

    MemoryRegion *ram = g_new(MemoryRegion, 1);

    MemoryRegion *bios = g_new(MemoryRegion, 1);

    ram_addr_t ram_size = machine->ram_size;

    long bios_size;

    uint8_t *spd_data;

    Error *err = NULL;

    int64_t kernel_entry;

    PCIBus *pci_bus;

    ISABus *isa_bus;
@@ -304,15 +294,12 @@ static void mips_fulong2e_init(MachineState *machine) 


    qemu_register_reset(main_cpu_reset, cpu);



    /* fulong 2e has 256M ram. */

    /* TODO: support more than 256M RAM as highmem */

    ram_size = 256 * MiB;



    /* fulong 2e has a 1M flash.Winbond W39L040AP70Z */

    bios_size = 1 * MiB;



    /* allocate RAM */

    memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);

    memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size,

    memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE,

                           &error_fatal);

    memory_region_set_readonly(bios, true);
@@ -360,8 +347,14 @@ static void mips_fulong2e_init(MachineState *machine) 
    vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],

                               &smbus, &isa_bus);



    /* TODO: Populate SPD eeprom data.  */

    smbus_eeprom_init(smbus, 1, eeprom_spd, sizeof(eeprom_spd));

    /* Populate SPD eeprom data */

    spd_data = spd_data_generate(DDR, ram_size, &err);

    if (err) {

        warn_report_err(err);

    }

    if (spd_data) {

        smbus_eeprom_init_one(smbus, 0x50, spd_data);

    }



    mc146818_rtc_init(isa_bus, 2000, NULL);
@@ -375,6 +368,7 @@ static void mips_fulong2e_machine_init(MachineClass *mc) 
    mc->init = mips_fulong2e_init;

    mc->block_default_type = IF_IDE;

    mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");

    mc->default_ram_size = 256 * MiB;

}



DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)

hw/misc/mips_itu.c

+1 −1
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ void itc_reconfigure(MIPSITUState *tag) 


    if (tag->saar_present) {

        address = ((*(uint64_t *) tag->saar) & 0xFFFFFFFFE000ULL) << 4;

        size = 1 << ((*(uint64_t *) tag->saar >> 1) & 0x1f);

        size = 1ULL << ((*(uint64_t *) tag->saar >> 1) & 0x1f);

        is_enabled = *(uint64_t *) tag->saar & 1;

    }

hw/pci-host/bonito.c

+6 −1
Original line number Diff line number Diff line
@@ -217,6 +217,7 @@ struct BonitoState { 
    PCIHostState parent_obj;

    qemu_irq *pic;

    PCIBonitoState *pci_dev;

    MemoryRegion pci_mem;

};



#define TYPE_BONITO_PCI_HOST_BRIDGE "Bonito-pcihost"
@@ -598,11 +599,15 @@ static const VMStateDescription vmstate_bonito = { 
static void bonito_pcihost_realize(DeviceState *dev, Error **errp)

{

    PCIHostState *phb = PCI_HOST_BRIDGE(dev);

    BonitoState *bs = BONITO_PCI_HOST_BRIDGE(dev);



    memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCILO_SIZE);

    phb->bus = pci_register_root_bus(DEVICE(dev), "pci",

                                     pci_bonito_set_irq, pci_bonito_map_irq,

                                     dev, get_system_memory(), get_system_io(),

                                     dev, &bs->pci_mem, get_system_io(),

                                     0x28, 32, TYPE_PCI_BUS);

    memory_region_add_subregion(get_system_memory(), BONITO_PCILO_BASE,

                                &bs->pci_mem);

}



static void bonito_realize(PCIDevice *dev, Error **errp)

qapi/target.json

+2 −2
Original line number Diff line number Diff line
@@ -499,7 +499,7 @@ 
            'static': 'bool',

            '*unavailable-features': [ 'str' ],

            'typename': 'str' },

  'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X)' }

  'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X) || defined(TARGET_MIPS)' }



##

# @query-cpu-definitions:
@@ -511,4 +511,4 @@ 
# Since: 1.2.0

##

{ 'command': 'query-cpu-definitions', 'returns': ['CpuDefinitionInfo'],

  'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X)' }
 
  'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X) || defined(TARGET_MIPS)' }

target/mips/helper.c

+33 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include "exec/cpu_ldst.h"

#include "exec/log.h"

#include "hw/mips/cpudevs.h"

#include "qapi/qapi-commands-target.h"



enum {

    TLBRET_XI = -6,
@@ -1470,3 +1471,35 @@ void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env, 


    cpu_loop_exit_restore(cs, pc);

}



static void mips_cpu_add_definition(gpointer data, gpointer user_data)

{

    ObjectClass *oc = data;

    CpuDefinitionInfoList **cpu_list = user_data;

    CpuDefinitionInfoList *entry;

    CpuDefinitionInfo *info;

    const char *typename;



    typename = object_class_get_name(oc);

    info = g_malloc0(sizeof(*info));

    info->name = g_strndup(typename,

                           strlen(typename) - strlen("-" TYPE_MIPS_CPU));

    info->q_typename = g_strdup(typename);



    entry = g_malloc0(sizeof(*entry));

    entry->value = info;

    entry->next = *cpu_list;

    *cpu_list = entry;

}



CpuDefinitionInfoList *qmp_query_cpu_definitions(Error **errp)

{

    CpuDefinitionInfoList *cpu_list = NULL;

    GSList *list;



    list = object_class_get_list(TYPE_MIPS_CPU, false);

    g_slist_foreach(list, mips_cpu_add_definition, &cpu_list);

    g_slist_free(list);



    return cpu_list;

}