Commit faf840a3 authored by Peter Maydell's avatar Peter Maydell
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20190221' into staging 



target-arm queue:
 * Model the Arm "Musca" development boards: "musca-a" and "musca-b1"
 * Implement the ARMv8.3-JSConv extension
 * v8M MPU should use background region as default, not always
 * Stop unintentional sign extension in pmu_init

# gpg: Signature made Thu 21 Feb 2019 18:56:32 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20190221: (21 commits)
  hw/arm/armsse: Make 0x5... alias region work for per-CPU devices
  hw/arm/musca: Wire up PL011 UARTs
  hw/arm/musca: Wire up PL031 RTC
  hw/arm/musca: Add MPCs
  hw/arm/musca: Add PPCs
  hw/arm/musca.c: Implement models of the Musca-A and -B1 boards
  hw/arm/armsse: Allow boards to specify init-svtor
  hw/arm/armsse: Document SRAM_ADDR_WIDTH property in header comment
  hw/char/pl011: Use '0x' prefix when logging hex numbers
  hw/char/pl011: Support all interrupt lines
  hw/char/pl011: Allow use as an embedded-struct device
  hw/timer/pl031: Convert to using trace events
  hw/timer/pl031: Allow use as an embedded-struct device
  hw/misc/tz-ppc: Support having unused ports in the middle of the range
  target/arm: Implement ARMv8.3-JSConv
  target/arm: Rearrange Floating-point data-processing (2 regs)
  target/arm: Split out vfp_helper.c
  target/arm: Restructure disas_fp_int_conv
  target/arm: Stop unintentional sign extension in pmu_init
  target/arm: v8M MPU should use background region as default, not always
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents fc3dbb90 3733f803

MAINTAINERS

+7 −0
Original line number Diff line number Diff line
@@ -491,6 +491,7 @@ F: hw/sd/pl181.c 
F: hw/ssi/pl022.c

F: include/hw/ssi/pl022.h

F: hw/timer/pl031.c

F: include/hw/timer/pl031.h

F: include/hw/arm/primecell.h

F: hw/timer/cmsdk-apb-timer.c

F: include/hw/timer/cmsdk-apb-timer.h
@@ -633,6 +634,12 @@ F: include/hw/misc/iotkit-sysinfo.h 
F: hw/misc/armsse-cpuid.c

F: include/hw/misc/armsse-cpuid.h



Musca

M: Peter Maydell <peter.maydell@linaro.org>

L: qemu-arm@nongnu.org

S: Maintained

F: hw/arm/musca.c



Musicpal

M: Jan Kiszka <jan.kiszka@web.de>

M: Peter Maydell <peter.maydell@linaro.org>

default-configs/arm-softmmu.mak

+1 −0
Original line number Diff line number Diff line
@@ -89,6 +89,7 @@ CONFIG_TUSB6010=y 
CONFIG_IMX=y

CONFIG_MAINSTONE=y

CONFIG_MPS2=y

CONFIG_MUSCA=y

CONFIG_NSERIES=y

CONFIG_RASPI=y

CONFIG_REALVIEW=y

hw/arm/Makefile.objs

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o 
obj-$(CONFIG_MPS2) += mps2.o

obj-$(CONFIG_MPS2) += mps2-tz.o

obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o

obj-$(CONFIG_MUSCA) += musca.o

obj-$(CONFIG_ARMSSE) += armsse.o

obj-$(CONFIG_FSL_IMX7) += fsl-imx7.o mcimx7d-sabre.o

obj-$(CONFIG_ARM_SMMUV3) += smmu-common.o smmuv3.o

hw/arm/armsse.c

+26 −18
Original line number Diff line number Diff line
@@ -110,15 +110,16 @@ static bool irq_is_common[32] = { 
    /* 30, 31: reserved */

};



/* Create an alias region of @size bytes starting at @base

/*

 * Create an alias region in @container of @size bytes starting at @base

 * which mirrors the memory starting at @orig.

 */

static void make_alias(ARMSSE *s, MemoryRegion *mr, const char *name,

                       hwaddr base, hwaddr size, hwaddr orig)

static void make_alias(ARMSSE *s, MemoryRegion *mr, MemoryRegion *container,

                       const char *name, hwaddr base, hwaddr size, hwaddr orig)

{

    memory_region_init_alias(mr, NULL, name, &s->container, orig, size);

    memory_region_init_alias(mr, NULL, name, container, orig, size);

    /* The alias is even lower priority than unimplemented_device regions */

    memory_region_add_subregion_overlap(&s->container, base, mr, -1500);

    memory_region_add_subregion_overlap(container, base, mr, -1500);

}



static void irq_status_forwarder(void *opaque, int n, int level)
@@ -505,11 +506,10 @@ static void armsse_realize(DeviceState *dev, Error **errp) 
         * the INITSVTOR* registers before powering up the CPUs in any case,

         * so the hardware's default value doesn't matter. QEMU doesn't emulate

         * the control processor, so instead we behave in the way that the

         * firmware does. All boards currently known about have firmware that

         * sets the INITSVTOR0 and INITSVTOR1 registers to 0x10000000, like the

         * IoTKit default. We can make this more configurable if necessary.

         * firmware does. The initial value is configurable by the board code

         * to match whatever its firmware does.

         */

        qdev_prop_set_uint32(cpudev, "init-svtor", 0x10000000);

        qdev_prop_set_uint32(cpudev, "init-svtor", s->init_svtor);

        /*

         * Start all CPUs except CPU0 powered down. In real hardware it is

         * a configurable property of the SSE-200 which CPUs start powered up
@@ -608,16 +608,21 @@ static void armsse_realize(DeviceState *dev, Error **errp) 
    }



    /* Set up the big aliases first */

    make_alias(s, &s->alias1, "alias 1", 0x10000000, 0x10000000, 0x00000000);

    make_alias(s, &s->alias2, "alias 2", 0x30000000, 0x10000000, 0x20000000);

    make_alias(s, &s->alias1, &s->container, "alias 1",

               0x10000000, 0x10000000, 0x00000000);

    make_alias(s, &s->alias2, &s->container,

               "alias 2", 0x30000000, 0x10000000, 0x20000000);

    /* The 0x50000000..0x5fffffff region is not a pure alias: it has

     * a few extra devices that only appear there (generally the

     * control interfaces for the protection controllers).

     * We implement this by mapping those devices over the top of this

     * alias MR at a higher priority.

     * alias MR at a higher priority. Some of the devices in this range

     * are per-CPU, so we must put this alias in the per-cpu containers.

     */

    make_alias(s, &s->alias3, "alias 3", 0x50000000, 0x10000000, 0x40000000);



    for (i = 0; i < info->num_cpus; i++) {

        make_alias(s, &s->alias3[i], &s->cpu_container[i],

                   "alias 3", 0x50000000, 0x10000000, 0x40000000);

    }



    /* Security controller */

    object_property_set_bool(OBJECT(&s->secctl), true, "realized", &err);
@@ -762,26 +767,28 @@ static void armsse_realize(DeviceState *dev, Error **errp) 


    if (info->has_mhus) {

        for (i = 0; i < ARRAY_SIZE(s->mhu); i++) {

            char *name = g_strdup_printf("MHU%d", i);

            char *port = g_strdup_printf("port[%d]", i + 3);

            char *name;

            char *port;



            name = g_strdup_printf("MHU%d", i);

            qdev_prop_set_string(DEVICE(&s->mhu[i]), "name", name);

            qdev_prop_set_uint64(DEVICE(&s->mhu[i]), "size", 0x1000);

            object_property_set_bool(OBJECT(&s->mhu[i]), true,

                                     "realized", &err);

            g_free(name);

            if (err) {

                error_propagate(errp, err);

                return;

            }

            port = g_strdup_printf("port[%d]", i + 3);

            mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mhu[i]), 0);

            object_property_set_link(OBJECT(&s->apb_ppc0), OBJECT(mr),

                                     port, &err);

            g_free(port);

            if (err) {

                error_propagate(errp, err);

                return;

            }

            g_free(name);

            g_free(port);

        }

    }
@@ -1185,6 +1192,7 @@ static Property armsse_properties[] = { 
    DEFINE_PROP_UINT32("EXP_NUMIRQ", ARMSSE, exp_numirq, 64),

    DEFINE_PROP_UINT32("MAINCLK", ARMSSE, mainclk_frq, 0),

    DEFINE_PROP_UINT32("SRAM_ADDR_WIDTH", ARMSSE, sram_addr_width, 15),

    DEFINE_PROP_UINT32("init-svtor", ARMSSE, init_svtor, 0x10000000),

    DEFINE_PROP_END_OF_LIST()

};

hw/arm/musca.c

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