Commit 93f379b0 authored Oct 24, 2018 by Richard Henderson Committed by Peter Maydell Oct 24, 2018

target/arm: Only flush tlb if ASID changes

Since QEMU does not implement ASIDs, changes to the ASID must flush the
tlb. However, if the ASID does not change there is no reason to flush.

In testing a boot of the Ubuntu installer to the first menu, this reduces
the number of flushes by 30%, or nearly 600k instances.

Reviewed-by: Aaron Lindsay <aaron@os.amperecomputing.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181019015617.22583-3-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

parent f478847f

target/arm/helper.c

+3 −5

Original line number	Diff line number	Diff line
		@@ -2758,12 +2758,10 @@ static void vmsa_tcr_el1_write(CPUARMState env, const ARMCPRegInfo ri,
		static void vmsa_ttbr_write(CPUARMState env, const ARMCPRegInfo ri,
		uint64_t value)
		{
		/* 64 bit accesses to the TTBRs can change the ASID and so we
		* must flush the TLB.
		*/
		if (cpreg_field_is_64bit(ri)) {
		/* If the ASID changes (with a 64-bit write), we must flush the TLB. */
		if (cpreg_field_is_64bit(ri) &&
		extract64(raw_read(env, ri) ^ value, 48, 16) != 0) {
		ARMCPU *cpu = arm_env_get_cpu(env);

		tlb_flush(CPU(cpu));
		}
		raw_write(env, ri, value);