Commit 91f78c58 authored by Philippe Mathieu-Daudé's avatar Philippe Mathieu-Daudé Committed by Peter Maydell
Browse files

target/arm: Restrict semi-hosting to TCG 



Per Peter Maydell:

  Semihosting hooks either SVC or HLT instructions, and inside KVM
  both of those go to EL1, ie to the guest, and can't be trapped to
  KVM.

Let check_for_semihosting() return False when not running on TCG.

Signed-off-by: default avatarPhilippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20190701194942.10092-3-philmd@redhat.com
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 9dd5cca4

target/arm/Makefile.objs

+1 −1
Original line number Diff line number Diff line 
obj-y += arm-semi.o

obj-$(CONFIG_TCG) += arm-semi.o

obj-y += helper.o vfp_helper.o

obj-y += cpu.o gdbstub.o

obj-$(TARGET_AARCH64) += cpu64.o gdbstub64.o

target/arm/cpu.h

+7 −0
Original line number Diff line number Diff line
@@ -964,7 +964,14 @@ static inline void aarch64_sve_change_el(CPUARMState *env, int o, 
{ }

#endif



#if !defined(CONFIG_TCG)

static inline target_ulong do_arm_semihosting(CPUARMState *env)

{

    g_assert_not_reached();

}

#else

target_ulong do_arm_semihosting(CPUARMState *env);

#endif

void aarch64_sync_32_to_64(CPUARMState *env);

void aarch64_sync_64_to_32(CPUARMState *env);

target/arm/helper.c

+7 −1
Original line number Diff line number Diff line
@@ -20,7 +20,6 @@ 
#include "qemu/qemu-print.h"

#include "exec/exec-all.h"

#include "exec/cpu_ldst.h"

#include "arm_ldst.h"

#include <zlib.h> /* For crc32 */

#include "hw/semihosting/semihost.h"

#include "sysemu/cpus.h"
@@ -29,6 +28,9 @@ 
#include "qapi/qapi-commands-machine-target.h"

#include "qapi/error.h"

#include "qemu/guest-random.h"

#ifdef CONFIG_TCG

#include "arm_ldst.h"

#endif



#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
@@ -10399,6 +10401,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) 


static inline bool check_for_semihosting(CPUState *cs)

{

#ifdef CONFIG_TCG

    /* Check whether this exception is a semihosting call; if so

     * then handle it and return true; otherwise return false.

     */
@@ -10474,6 +10477,9 @@ static inline bool check_for_semihosting(CPUState *cs) 
        env->regs[0] = do_arm_semihosting(env);

        return true;

    }

#else

    return false;

#endif

}



/* Handle a CPU exception for A and R profile CPUs.