Commit 8ae951fb authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.0-20190109' into staging 



ppc patch queue 2019-01-09

Second main pull request for qemu-4.0.  Highlights are:
 * Final parts of XIVE support for pseries (without KVM)
 * Preliminary work for PHB hotplug
 * Starting to use TCG vector operations

This includes some changes in the PCI core, which Michael Tsirkin
requested come through this tree, since they're primarily of interest
for ppc.

# gpg: Signature made Tue 08 Jan 2019 22:44:10 GMT
# gpg:                using RSA key 6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-4.0-20190109: (29 commits)
  spapr: enable XIVE MMIOs at reset
  spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS
  ppc/xics: allow ICSState to have an offset 0
  spapr: move the qemu_irq array under the machine
  pnv/psi: move the ICSState qemu_irq array under the PSI device model
  ppc: export the XICS and XIVE set_irq handlers
  spapr: return from post_load method when RTC import fails
  ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPU
  ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU
  spapr: modify the prototype of the cpu_intc_create() method
  spapr/xive: simplify the sPAPR IRQ qirq method for XIVE
  spapr_pci: Define SPAPR_MAX_PHBS in hw/pci-host/spapr.h
  pci: allow cleanup/unregistration of PCI root buses
  spapr: move spapr_create_phb() to core machine code
  MAINTAINERS: add qemu_vga.ndrv file entry for Mac machines
  MAINTAINERS: Add some missing ppc-related files
  target/ppc: replace AVR* macros with Vsr* macros
  target/ppc: move FP and VMX registers into aligned vsr register array
  target/ppc: merge ppc_vsr_t and ppc_avr_t union types
  target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env
  ...

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 147923b1 3a8eb78e

MAINTAINERS

+15 −2
Original line number Diff line number Diff line
@@ -962,6 +962,7 @@ L: qemu-ppc@nongnu.org 
S: Odd Fixes

F: hw/ppc/e500.[hc]

F: hw/ppc/e500plat.c

F: hw/gpio/mpc8xxx.c

F: include/hw/ppc/ppc_e500.h

F: include/hw/pci-host/ppce500.h

F: pc-bios/u-boot.e500
@@ -973,7 +974,7 @@ S: Odd Fixes 
F: hw/ppc/mpc8544ds.c

F: hw/ppc/mpc8544_guts.c



New World

New World (mac99)

M: David Gibson <david@gibson.dropbear.id.au>

L: qemu-ppc@nongnu.org

S: Odd Fixes
@@ -983,12 +984,15 @@ F: hw/pci-bridge/dec.[hc] 
F: hw/misc/macio/

F: hw/misc/mos6522.c

F: hw/nvram/mac_nvram.c

F: hw/input/adb*

F: include/hw/misc/macio/

F: include/hw/misc/mos6522.h

F: include/hw/ppc/mac_dbdma.h

F: include/hw/pci-host/uninorth.h

F: include/hw/input/adb*

F: pc-bios/qemu_vga.ndrv



Old World

Old World (g3beige)

M: David Gibson <david@gibson.dropbear.id.au>

L: qemu-ppc@nongnu.org

S: Odd Fixes
@@ -996,7 +1000,10 @@ F: hw/ppc/mac_oldworld.c 
F: hw/pci-host/grackle.c

F: hw/misc/macio/

F: hw/intc/heathrow_pic.c

F: hw/input/adb*

F: include/hw/intc/heathrow_pic.h

F: include/hw/input/adb*

F: pc-bios/qemu_vga.ndrv



PReP

M: Hervé Poussineau <hpoussin@reactos.org>
@@ -1052,8 +1059,14 @@ sam460ex 
M: BALATON Zoltan <balaton@eik.bme.hu>

L: qemu-ppc@nongnu.org

S: Maintained

F: hw/ppc/sam460ex.c

F: hw/ppc/ppc440_pcix.c

F: hw/display/sm501*

F: hw/ide/sii3112.c

F: hw/timer/m41t80.c

F: pc-bios/canyonlands.dt[sb]

F: pc-bios/u-boot-sam460ex-20100605.bin

F: roms/u-boot-sam460ex



SH4 Machines

------------

configure

+1 −1
Original line number Diff line number Diff line
@@ -3939,7 +3939,7 @@ if test "$fdt" != "no" ; then 
  cat > $TMPC << EOF

#include <libfdt.h>

#include <libfdt_env.h>

int main(void) { fdt_first_subnode(0, 0); return 0; }

int main(void) { fdt_check_full(NULL, 0); return 0; }

EOF

  if compile_prog "" "$fdt_libs" ; then

    # system DTC is good - use it

hw/intc/spapr_xive.c

+9 −14
Original line number Diff line number Diff line
@@ -179,6 +179,15 @@ static void spapr_xive_map_mmio(sPAPRXive *xive) 
    sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base);

}



void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable)

{

    memory_region_set_enabled(&xive->source.esb_mmio, enable);

    memory_region_set_enabled(&xive->tm_mmio, enable);



    /* Disable the END ESBs until a guest OS makes use of them */

    memory_region_set_enabled(&xive->end_source.esb_mmio, false);

}



/*

 * When a Virtual Processor is scheduled to run on a HW thread, the

 * hypervisor pushes its identifier in the OS CAM line. Emulate the
@@ -488,20 +497,6 @@ bool spapr_xive_irq_free(sPAPRXive *xive, uint32_t lisn) 
    return true;

}



qemu_irq spapr_xive_qirq(sPAPRXive *xive, uint32_t lisn)

{

    XiveSource *xsrc = &xive->source;



    if (lisn >= xive->nr_irqs) {

        return NULL;

    }



    /* The sPAPR machine/device should have claimed the IRQ before */

    assert(xive_eas_is_valid(&xive->eat[lisn]));



    return xive_source_qirq(xsrc, lisn);

}



/*

 * XIVE hcalls

 *

hw/intc/xics.c

+1 −3
Original line number Diff line number Diff line
@@ -461,7 +461,7 @@ static void ics_simple_set_irq_lsi(ICSState *ics, int srcno, int val) 
    ics_simple_resend_lsi(ics, srcno);

}



static void ics_simple_set_irq(void *opaque, int srcno, int val)

void ics_simple_set_irq(void *opaque, int srcno, int val)

{

    ICSState *ics = (ICSState *)opaque;
@@ -571,8 +571,6 @@ static void ics_simple_realize(DeviceState *dev, Error **errp) 
        return;

    }



    ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);



    qemu_register_reset(ics_simple_reset_handler, ics);

}

hw/intc/xics_kvm.c

+1 −2
Original line number Diff line number Diff line
@@ -298,7 +298,7 @@ static int ics_set_kvm_state(ICSState *ics, int version_id) 
    return 0;

}



static void ics_kvm_set_irq(void *opaque, int srcno, int val)

void ics_kvm_set_irq(void *opaque, int srcno, int val)

{

    ICSState *ics = opaque;

    struct kvm_irq_level args;
@@ -344,7 +344,6 @@ static void ics_kvm_realize(DeviceState *dev, Error **errp) 
        error_propagate(errp, local_err);

        return;

    }

    ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);



    qemu_register_reset(ics_kvm_reset_handler, ics);

}