Loading hw/intc/spapr_xive.c +9 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,15 @@ static void spapr_xive_map_mmio(sPAPRXive *xive) sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); } void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable) { memory_region_set_enabled(&xive->source.esb_mmio, enable); memory_region_set_enabled(&xive->tm_mmio, enable); /* Disable the END ESBs until a guest OS makes use of them */ memory_region_set_enabled(&xive->end_source.esb_mmio, false); } /* * When a Virtual Processor is scheduled to run on a HW thread, the * hypervisor pushes its identifier in the OS CAM line. Emulate the Loading hw/ppc/spapr_irq.c +9 −0 Original line number Diff line number Diff line Loading @@ -375,6 +375,9 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spapr, Error **errp) /* (TCG) Set the OS CAM line of the thread interrupt context. */ spapr_xive_set_tctx_os_cam(cpu->tctx); } /* Activate the XIVE MMIOs */ spapr_xive_mmio_set_enabled(spapr->xive, true); } static void spapr_irq_set_irq_xive(void *opaque, int srcno, int val) Loading Loading @@ -549,6 +552,12 @@ static int spapr_irq_post_load_dual(sPAPRMachineState *spapr, int version_id) static void spapr_irq_reset_dual(sPAPRMachineState *spapr, Error **errp) { /* * Deactivate the XIVE MMIOs. The XIVE backend will reenable them * if selected. */ spapr_xive_mmio_set_enabled(spapr->xive, false); spapr_irq_current(spapr)->reset(spapr, errp); } Loading include/hw/ppc/spapr_xive.h +1 −0 Original line number Diff line number Diff line Loading @@ -47,5 +47,6 @@ void spapr_xive_hcall_init(sPAPRMachineState *spapr); void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable); #endif /* PPC_SPAPR_XIVE_H */ Loading
hw/intc/spapr_xive.c +9 −0 Original line number Diff line number Diff line Loading @@ -179,6 +179,15 @@ static void spapr_xive_map_mmio(sPAPRXive *xive) sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); } void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable) { memory_region_set_enabled(&xive->source.esb_mmio, enable); memory_region_set_enabled(&xive->tm_mmio, enable); /* Disable the END ESBs until a guest OS makes use of them */ memory_region_set_enabled(&xive->end_source.esb_mmio, false); } /* * When a Virtual Processor is scheduled to run on a HW thread, the * hypervisor pushes its identifier in the OS CAM line. Emulate the Loading
hw/ppc/spapr_irq.c +9 −0 Original line number Diff line number Diff line Loading @@ -375,6 +375,9 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spapr, Error **errp) /* (TCG) Set the OS CAM line of the thread interrupt context. */ spapr_xive_set_tctx_os_cam(cpu->tctx); } /* Activate the XIVE MMIOs */ spapr_xive_mmio_set_enabled(spapr->xive, true); } static void spapr_irq_set_irq_xive(void *opaque, int srcno, int val) Loading Loading @@ -549,6 +552,12 @@ static int spapr_irq_post_load_dual(sPAPRMachineState *spapr, int version_id) static void spapr_irq_reset_dual(sPAPRMachineState *spapr, Error **errp) { /* * Deactivate the XIVE MMIOs. The XIVE backend will reenable them * if selected. */ spapr_xive_mmio_set_enabled(spapr->xive, false); spapr_irq_current(spapr)->reset(spapr, errp); } Loading
include/hw/ppc/spapr_xive.h +1 −0 Original line number Diff line number Diff line Loading @@ -47,5 +47,6 @@ void spapr_xive_hcall_init(sPAPRMachineState *spapr); void spapr_dt_xive(sPAPRMachineState *spapr, uint32_t nr_servers, void *fdt, uint32_t phandle); void spapr_xive_set_tctx_os_cam(XiveTCTX *tctx); void spapr_xive_mmio_set_enabled(sPAPRXive *xive, bool enable); #endif /* PPC_SPAPR_XIVE_H */