Commit 872ff3de authored by Cédric Le Goater's avatar Cédric Le Goater Committed by David Gibson
Browse files

spapr: move the qemu_irq array under the machine



The qemu_irq array is now allocated at the machine level using a sPAPR
IRQ set_irq handler depending on the chosen interrupt mode. The use of
this handler is slightly inefficient today but it will become necessary
when the 'dual' interrupt mode is introduced.

Signed-off-by: default avatarCédric Le Goater <clg@kaod.org>
Signed-off-by: default avatarDavid Gibson <david@gibson.dropbear.id.au>
parent f8df9003
Loading
Loading
Loading
Loading
+0 −2
Original line number Diff line number Diff line
@@ -571,8 +571,6 @@ static void ics_simple_realize(DeviceState *dev, Error **errp)
        return;
    }

    ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);

    qemu_register_reset(ics_simple_reset_handler, ics);
}

+0 −1
Original line number Diff line number Diff line
@@ -344,7 +344,6 @@ static void ics_kvm_realize(DeviceState *dev, Error **errp)
        error_propagate(errp, local_err);
        return;
    }
    ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);

    qemu_register_reset(ics_kvm_reset_handler, ics);
}
+0 −3
Original line number Diff line number Diff line
@@ -932,9 +932,6 @@ static void xive_source_realize(DeviceState *dev, Error **errp)
                          &xive_source_esb_ops, xsrc, "xive.esb",
                          (1ull << xsrc->esb_shift) * xsrc->nr_irqs);

    xsrc->qirqs = qemu_allocate_irqs(xive_source_set_irq, xsrc,
                                     xsrc->nr_irqs);

    qemu_register_reset(xive_source_reset, dev);
}

+27 −3
Original line number Diff line number Diff line
@@ -171,7 +171,7 @@ static qemu_irq spapr_qirq_xics(sPAPRMachineState *spapr, int irq)
    uint32_t srcno = irq - ics->offset;

    if (ics_valid_irq(ics, irq)) {
        return ics->qirqs[srcno];
        return spapr->qirqs[srcno];
    }

    return NULL;
@@ -218,6 +218,18 @@ static int spapr_irq_post_load_xics(sPAPRMachineState *spapr, int version_id)
    return 0;
}

static void spapr_irq_set_irq_xics(void *opaque, int srcno, int val)
{
    sPAPRMachineState *spapr = opaque;
    MachineState *machine = MACHINE(opaque);

    if (kvm_enabled() && machine_kernel_irqchip_allowed(machine)) {
        ics_kvm_set_irq(spapr->ics, srcno, val);
    } else {
        ics_simple_set_irq(spapr->ics, srcno, val);
    }
}

#define SPAPR_IRQ_XICS_NR_IRQS     0x1000
#define SPAPR_IRQ_XICS_NR_MSIS     \
    (XICS_IRQ_BASE + SPAPR_IRQ_XICS_NR_IRQS - SPAPR_IRQ_MSI)
@@ -235,6 +247,7 @@ sPAPRIrq spapr_irq_xics = {
    .dt_populate = spapr_dt_xics,
    .cpu_intc_create = spapr_irq_cpu_intc_create_xics,
    .post_load   = spapr_irq_post_load_xics,
    .set_irq     = spapr_irq_set_irq_xics,
};

/*
@@ -295,7 +308,6 @@ static void spapr_irq_free_xive(sPAPRMachineState *spapr, int irq, int num)
static qemu_irq spapr_qirq_xive(sPAPRMachineState *spapr, int irq)
{
    sPAPRXive *xive = spapr->xive;
    XiveSource *xsrc = &xive->source;

    if (irq >= xive->nr_irqs) {
        return NULL;
@@ -304,7 +316,7 @@ static qemu_irq spapr_qirq_xive(sPAPRMachineState *spapr, int irq)
    /* The sPAPR machine/device should have claimed the IRQ before */
    assert(xive_eas_is_valid(&xive->eat[irq]));

    return xsrc->qirqs[irq];
    return spapr->qirqs[irq];
}

static void spapr_irq_print_info_xive(sPAPRMachineState *spapr,
@@ -359,6 +371,13 @@ static void spapr_irq_reset_xive(sPAPRMachineState *spapr, Error **errp)
    }
}

static void spapr_irq_set_irq_xive(void *opaque, int srcno, int val)
{
    sPAPRMachineState *spapr = opaque;

    xive_source_set_irq(&spapr->xive->source, srcno, val);
}

/*
 * XIVE uses the full IRQ number space. Set it to 8K to be compatible
 * with XICS.
@@ -381,6 +400,7 @@ sPAPRIrq spapr_irq_xive = {
    .cpu_intc_create = spapr_irq_cpu_intc_create_xive,
    .post_load   = spapr_irq_post_load_xive,
    .reset       = spapr_irq_reset_xive,
    .set_irq     = spapr_irq_set_irq_xive,
};

/*
@@ -394,6 +414,9 @@ void spapr_irq_init(sPAPRMachineState *spapr, Error **errp)
    }

    spapr->irq->init(spapr, errp);

    spapr->qirqs = qemu_allocate_irqs(spapr->irq->set_irq, spapr,
                                      spapr->irq->nr_irqs);
}

int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp)
@@ -493,4 +516,5 @@ sPAPRIrq spapr_irq_xics_legacy = {
    .dt_populate = spapr_dt_xics,
    .cpu_intc_create = spapr_irq_cpu_intc_create_xics,
    .post_load   = spapr_irq_post_load_xics,
    .set_irq     = spapr_irq_set_irq_xics,
};
+1 −0
Original line number Diff line number Diff line
@@ -182,6 +182,7 @@ struct sPAPRMachineState {
    unsigned long *irq_map;
    sPAPRXive  *xive;
    sPAPRIrq *irq;
    qemu_irq *qirqs;

    bool cmd_line_caps[SPAPR_CAP_NUM];
    sPAPRCapabilities def, eff, mig;
Loading