Commit 7edd8e46 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging 



* more of Peter Crosthwaite's multiarch preparation patches
* unlocked MMIO support in KVM
* support for compilation with ICC

# gpg: Signature made Mon Jul  6 13:59:20 2015 BST using RSA key ID 78C7AE83
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
# gpg: WARNING: This key is not certified with sufficiently trusted signatures!
# gpg:          It is not certain that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* remotes/bonzini/tags/for-upstream:
  exec: skip MMIO regions correctly in cpu_physical_memory_write_rom_internal
  Stop including qemu-common.h in memory.h
  kvm: Switch to unlocked MMIO
  acpi: mark PMTIMER as unlocked
  kvm: Switch to unlocked PIO
  kvm: First step to push iothread lock out of inner run loop
  memory: let address_space_rw/ld*/st* run outside the BQL
  exec: pull qemu_flush_coalesced_mmio_buffer() into address_space_rw/ld*/st*
  memory: Add global-locking property to memory regions
  main-loop: introduce qemu_mutex_iothread_locked
  main-loop: use qemu_mutex_lock_iothread consistently
  Fix irq route entries exceeding KVM_MAX_IRQ_ROUTES
  cpu-defs: Move out TB_JMP defines
  include/exec: Move tb hash functions out
  include/exec: Move standard exceptions to cpu-all.h
  cpu-defs: Move CPU_TEMP_BUF_NLONGS to tcg
  memory_mapping: Rework cpu related includes
  cutils: allow compilation with icc
  qemu-common: add VEC_OR macro

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 3fa18bc9 b242e0e0

cpu-exec.c

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ 
#include "exec/address-spaces.h"

#include "exec/memory-internal.h"

#include "qemu/rcu.h"

#include "exec/tb-hash.h"



/* -icount align implementation. */

cpus.c

+16 −3
Original line number Diff line number Diff line
@@ -954,7 +954,7 @@ static void *qemu_kvm_cpu_thread_fn(void *arg) 
    CPUState *cpu = arg;

    int r;



    qemu_mutex_lock(&qemu_global_mutex);

    qemu_mutex_lock_iothread();

    qemu_thread_get_self(cpu->thread);

    cpu->thread_id = qemu_get_thread_id();

    cpu->can_do_io = 1;
@@ -1034,10 +1034,10 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) 
{

    CPUState *cpu = arg;



    qemu_mutex_lock_iothread();

    qemu_tcg_init_cpu_signals();

    qemu_thread_get_self(cpu->thread);



    qemu_mutex_lock(&qemu_global_mutex);

    CPU_FOREACH(cpu) {

        cpu->thread_id = qemu_get_thread_id();

        cpu->created = true;
@@ -1146,10 +1146,21 @@ bool qemu_in_vcpu_thread(void) 
    return current_cpu && qemu_cpu_is_self(current_cpu);

}



static __thread bool iothread_locked = false;



bool qemu_mutex_iothread_locked(void)

{

    return iothread_locked;

}



void qemu_mutex_lock_iothread(void)

{

    atomic_inc(&iothread_requesting_mutex);

    if (!tcg_enabled() || !first_cpu || !first_cpu->thread) {

    /* In the simple case there is no need to bump the VCPU thread out of

     * TCG code execution.

     */

    if (!tcg_enabled() || qemu_in_vcpu_thread() ||

        !first_cpu || !first_cpu->thread) {

        qemu_mutex_lock(&qemu_global_mutex);

        atomic_dec(&iothread_requesting_mutex);

    } else {
@@ -1160,10 +1171,12 @@ void qemu_mutex_lock_iothread(void) 
        atomic_dec(&iothread_requesting_mutex);

        qemu_cond_broadcast(&qemu_io_proceeded_cond);

    }

    iothread_locked = true;

}



void qemu_mutex_unlock_iothread(void)

{

    iothread_locked = false;

    qemu_mutex_unlock(&qemu_global_mutex);

}

exec.c

+82 −1
Original line number Diff line number Diff line
@@ -48,6 +48,7 @@ 
#endif

#include "exec/cpu-all.h"

#include "qemu/rcu_queue.h"

#include "qemu/main-loop.h"

#include "exec/cputlb.h"

#include "translate-all.h"
@@ -352,6 +353,18 @@ address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *x 
    *xlat = addr + section->offset_within_region;



    mr = section->mr;



    /* MMIO registers can be expected to perform full-width accesses based only

     * on their address, without considering adjacent registers that could

     * decode to completely different MemoryRegions.  When such registers

     * exist (e.g. I/O ports 0xcf8 and 0xcf9 on most PC chipsets), MMIO

     * regions overlap wildly.  For this reason we cannot clamp the accesses

     * here.

     *

     * If the length is small (as is the case for address_space_ldl/stl),

     * everything works fine.  If the incoming length is large, however,

     * the caller really has to do the clamping through memory_access_size.

     */

    if (memory_region_is_ram(mr)) {

        diff = int128_sub(section->size, int128_make64(addr));

        *plen = int128_get64(int128_min(diff, int128_make64(*plen)));
@@ -2316,6 +2329,29 @@ static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr) 
    return l;

}



static bool prepare_mmio_access(MemoryRegion *mr)

{

    bool unlocked = !qemu_mutex_iothread_locked();

    bool release_lock = false;



    if (unlocked && mr->global_locking) {

        qemu_mutex_lock_iothread();

        unlocked = false;

        release_lock = true;

    }

    if (mr->flush_coalesced_mmio) {

        if (unlocked) {

            qemu_mutex_lock_iothread();

        }

        qemu_flush_coalesced_mmio_buffer();

        if (unlocked) {

            qemu_mutex_unlock_iothread();

        }

    }



    return release_lock;

}



MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs,

                             uint8_t *buf, int len, bool is_write)

{
@@ -2325,6 +2361,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, 
    hwaddr addr1;

    MemoryRegion *mr;

    MemTxResult result = MEMTX_OK;

    bool release_lock = false;



    rcu_read_lock();

    while (len > 0) {
@@ -2333,6 +2370,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, 


        if (is_write) {

            if (!memory_access_is_direct(mr, is_write)) {

                release_lock |= prepare_mmio_access(mr);

                l = memory_access_size(mr, l, addr1);

                /* XXX: could force current_cpu to NULL to avoid

                   potential bugs */
@@ -2374,6 +2412,7 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, 
        } else {

            if (!memory_access_is_direct(mr, is_write)) {

                /* I/O case */

                release_lock |= prepare_mmio_access(mr);

                l = memory_access_size(mr, l, addr1);

                switch (l) {

                case 8:
@@ -2409,6 +2448,12 @@ MemTxResult address_space_rw(AddressSpace *as, hwaddr addr, MemTxAttrs attrs, 
                memcpy(buf, ptr, l);

            }

        }



        if (release_lock) {

            qemu_mutex_unlock_iothread();

            release_lock = false;

        }



        len -= l;

        buf += l;

        addr += l;
@@ -2458,7 +2503,7 @@ static inline void cpu_physical_memory_write_rom_internal(AddressSpace *as, 


        if (!(memory_region_is_ram(mr) ||

              memory_region_is_romd(mr))) {

            /* do nothing */

            l = memory_access_size(mr, l, addr1);

        } else {

            addr1 += memory_region_get_ram_addr(mr);

            /* ROM/RAM case */
@@ -2735,10 +2780,13 @@ static inline uint32_t address_space_ldl_internal(AddressSpace *as, hwaddr addr, 
    hwaddr l = 4;

    hwaddr addr1;

    MemTxResult r;

    bool release_lock = false;



    rcu_read_lock();

    mr = address_space_translate(as, addr, &addr1, &l, false);

    if (l < 4 || !memory_access_is_direct(mr, false)) {

        release_lock |= prepare_mmio_access(mr);



        /* I/O case */

        r = memory_region_dispatch_read(mr, addr1, &val, 4, attrs);

#if defined(TARGET_WORDS_BIGENDIAN)
@@ -2771,6 +2819,9 @@ static inline uint32_t address_space_ldl_internal(AddressSpace *as, hwaddr addr, 
    if (result) {

        *result = r;

    }

    if (release_lock) {

        qemu_mutex_unlock_iothread();

    }

    rcu_read_unlock();

    return val;

}
@@ -2823,11 +2874,14 @@ static inline uint64_t address_space_ldq_internal(AddressSpace *as, hwaddr addr, 
    hwaddr l = 8;

    hwaddr addr1;

    MemTxResult r;

    bool release_lock = false;



    rcu_read_lock();

    mr = address_space_translate(as, addr, &addr1, &l,

                                 false);

    if (l < 8 || !memory_access_is_direct(mr, false)) {

        release_lock |= prepare_mmio_access(mr);



        /* I/O case */

        r = memory_region_dispatch_read(mr, addr1, &val, 8, attrs);

#if defined(TARGET_WORDS_BIGENDIAN)
@@ -2860,6 +2914,9 @@ static inline uint64_t address_space_ldq_internal(AddressSpace *as, hwaddr addr, 
    if (result) {

        *result = r;

    }

    if (release_lock) {

        qemu_mutex_unlock_iothread();

    }

    rcu_read_unlock();

    return val;

}
@@ -2932,11 +2989,14 @@ static inline uint32_t address_space_lduw_internal(AddressSpace *as, 
    hwaddr l = 2;

    hwaddr addr1;

    MemTxResult r;

    bool release_lock = false;



    rcu_read_lock();

    mr = address_space_translate(as, addr, &addr1, &l,

                                 false);

    if (l < 2 || !memory_access_is_direct(mr, false)) {

        release_lock |= prepare_mmio_access(mr);



        /* I/O case */

        r = memory_region_dispatch_read(mr, addr1, &val, 2, attrs);

#if defined(TARGET_WORDS_BIGENDIAN)
@@ -2969,6 +3029,9 @@ static inline uint32_t address_space_lduw_internal(AddressSpace *as, 
    if (result) {

        *result = r;

    }

    if (release_lock) {

        qemu_mutex_unlock_iothread();

    }

    rcu_read_unlock();

    return val;

}
@@ -3021,11 +3084,14 @@ void address_space_stl_notdirty(AddressSpace *as, hwaddr addr, uint32_t val, 
    hwaddr addr1;

    MemTxResult r;

    uint8_t dirty_log_mask;

    bool release_lock = false;



    rcu_read_lock();

    mr = address_space_translate(as, addr, &addr1, &l,

                                 true);

    if (l < 4 || !memory_access_is_direct(mr, true)) {

        release_lock |= prepare_mmio_access(mr);



        r = memory_region_dispatch_write(mr, addr1, val, 4, attrs);

    } else {

        addr1 += memory_region_get_ram_addr(mr) & TARGET_PAGE_MASK;
@@ -3040,6 +3106,9 @@ void address_space_stl_notdirty(AddressSpace *as, hwaddr addr, uint32_t val, 
    if (result) {

        *result = r;

    }

    if (release_lock) {

        qemu_mutex_unlock_iothread();

    }

    rcu_read_unlock();

}
@@ -3060,11 +3129,14 @@ static inline void address_space_stl_internal(AddressSpace *as, 
    hwaddr l = 4;

    hwaddr addr1;

    MemTxResult r;

    bool release_lock = false;



    rcu_read_lock();

    mr = address_space_translate(as, addr, &addr1, &l,

                                 true);

    if (l < 4 || !memory_access_is_direct(mr, true)) {

        release_lock |= prepare_mmio_access(mr);



#if defined(TARGET_WORDS_BIGENDIAN)

        if (endian == DEVICE_LITTLE_ENDIAN) {

            val = bswap32(val);
@@ -3096,6 +3168,9 @@ static inline void address_space_stl_internal(AddressSpace *as, 
    if (result) {

        *result = r;

    }

    if (release_lock) {

        qemu_mutex_unlock_iothread();

    }

    rcu_read_unlock();

}
@@ -3165,10 +3240,13 @@ static inline void address_space_stw_internal(AddressSpace *as, 
    hwaddr l = 2;

    hwaddr addr1;

    MemTxResult r;

    bool release_lock = false;



    rcu_read_lock();

    mr = address_space_translate(as, addr, &addr1, &l, true);

    if (l < 2 || !memory_access_is_direct(mr, true)) {

        release_lock |= prepare_mmio_access(mr);



#if defined(TARGET_WORDS_BIGENDIAN)

        if (endian == DEVICE_LITTLE_ENDIAN) {

            val = bswap16(val);
@@ -3200,6 +3278,9 @@ static inline void address_space_stw_internal(AddressSpace *as, 
    if (result) {

        *result = r;

    }

    if (release_lock) {

        qemu_mutex_unlock_iothread();

    }

    rcu_read_unlock();

}

hw/acpi/core.c

+1 −0
Original line number Diff line number Diff line
@@ -528,6 +528,7 @@ void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, 
    ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar);

    memory_region_init_io(&ar->tmr.io, memory_region_owner(parent),

                          &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);

    memory_region_clear_global_locking(&ar->tmr.io);

    memory_region_add_subregion(parent, 8, &ar->tmr.io);

}

include/exec/cpu-all.h

+6 −0
Original line number Diff line number Diff line
@@ -26,6 +26,12 @@ 
#include "qom/cpu.h"

#include "qemu/rcu.h"



#define EXCP_INTERRUPT 	0x10000 /* async interruption */

#define EXCP_HLT        0x10001 /* hlt instruction reached */

#define EXCP_DEBUG      0x10002 /* cpu stopped after a breakpoint or singlestep */

#define EXCP_HALTED     0x10003 /* cpu is halted (waiting for external event) */

#define EXCP_YIELD      0x10004 /* cpu wants to yield timeslice to another */



/* some important defines:

 *

 * WORDS_ALIGNED : if defined, the host cpu can only make word aligned