Commit 6d6ad1d1 authored by David Hildenbrand's avatar David Hildenbrand Committed by Cornelia Huck
Browse files

s390x/tcg: Hide IEEE underflows in some scenarios 



IEEE underflows are not reported when the mask bit is off and we don't
also have an inexact exception.

z14 PoP, 9-20, "IEEE Underflow":
    An IEEE-underflow exception is recognized for an
    IEEE target when the tininess condition exists and
    either: (1) the IEEE-underflow mask bit in the FPC
    register is zero and the result value is inexact, or (2)
    the IEEE-underflow mask bit in the FPC register is
    one.

Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarDavid Hildenbrand <david@redhat.com>
Message-Id: <20190218122710.23639-6-david@redhat.com>
Signed-off-by: default avatarCornelia Huck <cohuck@redhat.com>
parent fcb9e9f2

target/s390x/fpu_helper.c

+13 −0
Original line number Diff line number Diff line
@@ -63,6 +63,19 @@ static void handle_exceptions(CPUS390XState *env, uintptr_t retaddr) 
    env->fpu_status.float_exception_flags = 0;

    s390_exc = s390_softfloat_exc_to_ieee(qemu_exc);



    /*

     * IEEE-Underflow exception recognition exists if a tininess condition

     * (underflow) exists and

     * - The mask bit in the FPC is zero and the result is inexact

     * - The mask bit in the FPC is one

     * So tininess conditions that are not inexact don't trigger any

     * underflow action in case the mask bit is not one.

     */

    if (!(s390_exc & S390_IEEE_MASK_INEXACT) &&

        !((env->fpc >> 24) & S390_IEEE_MASK_UNDERFLOW)) {

        s390_exc &= ~S390_IEEE_MASK_UNDERFLOW;

    }



    /*

     * FIXME:

     * 1. Right now, all inexact conditions are inidicated as