Commit 67c332fd authored by Andreas Färber's avatar Andreas Färber Committed by Anthony Liguori
Browse files

pci: Tidy up PCI host bridges 



Adopt the QOM parent field name and enforce QOM-style access via casts.
Don't just typedef PCIHostState, either use it directly or embed it.

Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
Signed-off-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
parent 8558d942

hw/alpha_typhoon.c

+1 −1
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ typedef struct TyphoonPchip { 
    OBJECT_CHECK(TyphoonState, (obj), TYPE_TYPHOON_PCI_HOST_BRIDGE)



typedef struct TyphoonState {

    PCIHostState host;

    PCIHostState parent_obj;



    TyphoonCchip cchip;

    TyphoonPchip pchip;

hw/dec_pci.c

+1 −1
Original line number Diff line number Diff line
@@ -43,7 +43,7 @@ 
#define DEC_21154(obj) OBJECT_CHECK(DECState, (obj), TYPE_DEC_21154)



typedef struct DECState {

    PCIHostState host_state;

    PCIHostState parent_obj;

} DECState;



static int dec_map_irq(PCIDevice *pci_dev, int irq_num)

hw/grackle_pci.c

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ 
    OBJECT_CHECK(GrackleState, (obj), TYPE_GRACKLE_PCI_HOST_BRIDGE)



typedef struct GrackleState {

    PCIHostState host_state;

    PCIHostState parent_obj;



    MemoryRegion pci_mmio;

    MemoryRegion pci_hole;

hw/gt64xxx.c

+16 −10
Original line number Diff line number Diff line
@@ -235,7 +235,7 @@ 
    OBJECT_CHECK(GT64120State, (obj), TYPE_GT64120_PCI_HOST_BRIDGE)



typedef struct GT64120State {

    PCIHostState pci;

    PCIHostState parent_obj;



    uint32_t regs[GT_REGS];

    PCI_MAPPING_ENTRY(PCI0IO);
@@ -315,6 +315,7 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, 
                            uint64_t val, unsigned size)

{

    GT64120State *s = opaque;

    PCIHostState *phb = PCI_HOST_BRIDGE(s);

    uint32_t saddr;



    if (!(s->regs[GT_CPU] & 0x00001000))
@@ -535,13 +536,15 @@ static void gt64120_writel (void *opaque, target_phys_addr_t addr, 
        /* not implemented */

        break;

    case GT_PCI0_CFGADDR:

        s->pci.config_reg = val & 0x80fffffc;

        phb->config_reg = val & 0x80fffffc;

        break;

    case GT_PCI0_CFGDATA:

        if (!(s->regs[GT_PCI0_CMD] & 1) && (s->pci.config_reg & 0x00fff800))

        if (!(s->regs[GT_PCI0_CMD] & 1) && (phb->config_reg & 0x00fff800)) {

            val = bswap32(val);

        if (s->pci.config_reg & (1u << 31))

            pci_data_write(s->pci.bus, s->pci.config_reg, val, 4);

        }

        if (phb->config_reg & (1u << 31)) {

            pci_data_write(phb->bus, phb->config_reg, val, 4);

        }

        break;



    /* Interrupts */
@@ -594,6 +597,7 @@ static uint64_t gt64120_readl (void *opaque, 
                               target_phys_addr_t addr, unsigned size)

{

    GT64120State *s = opaque;

    PCIHostState *phb = PCI_HOST_BRIDGE(s);

    uint32_t val;

    uint32_t saddr;
@@ -775,15 +779,17 @@ static uint64_t gt64120_readl (void *opaque, 


    /* PCI Internal */

    case GT_PCI0_CFGADDR:

        val = s->pci.config_reg;

        val = phb->config_reg;

        break;

    case GT_PCI0_CFGDATA:

        if (!(s->pci.config_reg & (1 << 31)))

        if (!(phb->config_reg & (1 << 31))) {

            val = 0xffffffff;

        else

            val = pci_data_read(s->pci.bus, s->pci.config_reg, 4);

        if (!(s->regs[GT_PCI0_CMD] & 1) && (s->pci.config_reg & 0x00fff800))

        } else {

            val = pci_data_read(phb->bus, phb->config_reg, 4);

        }

        if (!(s->regs[GT_PCI0_CMD] & 1) && (phb->config_reg & 0x00fff800)) {

            val = bswap32(val);

        }

        break;



    case GT_PCI0_CMD:

hw/piix_pci.c

+4 −2
Original line number Diff line number Diff line
@@ -36,7 +36,9 @@ 
 * http://download.intel.com/design/chipsets/datashts/29054901.pdf

 */



typedef PCIHostState I440FXState;

typedef struct I440FXState {

    PCIHostState parent_obj;

} I440FXState;



#define PIIX_NUM_PIC_IRQS       16      /* i8259 * 2 */

#define PIIX_NUM_PIRQS          4ULL    /* PIRQ[A-D] */
@@ -274,7 +276,7 @@ static PCIBus *i440fx_common_init(const char *device_name, 
    dev = qdev_create(NULL, "i440FX-pcihost");

    s = PCI_HOST_BRIDGE(dev);

    s->address_space = address_space_mem;

    b = pci_bus_new(&s->busdev.qdev, NULL, pci_address_space,

    b = pci_bus_new(dev, NULL, pci_address_space,

                    address_space_io, 0);

    s->bus = b;

    object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), NULL);