Commit 8558d942 authored by Andreas Färber's avatar Andreas Färber Committed by Anthony Liguori
Browse files

pci: Derive PCI host bridges from TYPE_PCI_HOST_BRIDGE 



Use PCIHostState and PCI_HOST_BRIDGE() where appropriate.

Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
Signed-off-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
parent b44ff9d4

hw/alpha_typhoon.c

+2 −2
Original line number Diff line number Diff line
@@ -715,7 +715,7 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, 
    qdev_init_nofail(dev);



    s = TYPHOON_PCI_HOST_BRIDGE(dev);

    phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(dev));

    phb = PCI_HOST_BRIDGE(dev);



    /* Remember the CPUs so that we can deliver interrupts to them.  */

    for (i = 0; i < 4; i++) {
@@ -825,7 +825,7 @@ static void typhoon_pcihost_class_init(ObjectClass *klass, void *data) 


static const TypeInfo typhoon_pcihost_info = {

    .name          = TYPE_TYPHOON_PCI_HOST_BRIDGE,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .parent        = TYPE_PCI_HOST_BRIDGE,

    .instance_size = sizeof(TyphoonState),

    .class_init    = typhoon_pcihost_class_init,

};

hw/bonito.c

+11 −11
Original line number Diff line number Diff line
@@ -416,7 +416,7 @@ static const MemoryRegionOps bonito_cop_ops = { 
static uint32_t bonito_sbridge_pciaddr(void *opaque, target_phys_addr_t addr)

{

    PCIBonitoState *s = opaque;

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost));

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);

    uint32_t cfgaddr;

    uint32_t idsel;

    uint32_t devno;
@@ -454,7 +454,7 @@ static void bonito_spciconf_writeb(void *opaque, target_phys_addr_t addr, 
{

    PCIBonitoState *s = opaque;

    PCIDevice *d = PCI_DEVICE(s);

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost));

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);

    uint32_t pciaddr;

    uint16_t status;
@@ -480,7 +480,7 @@ static void bonito_spciconf_writew(void *opaque, target_phys_addr_t addr, 
{

    PCIBonitoState *s = opaque;

    PCIDevice *d = PCI_DEVICE(s);

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost));

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);

    uint32_t pciaddr;

    uint16_t status;
@@ -508,7 +508,7 @@ static void bonito_spciconf_writel(void *opaque, target_phys_addr_t addr, 
{

    PCIBonitoState *s = opaque;

    PCIDevice *d = PCI_DEVICE(s);

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost));

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);

    uint32_t pciaddr;

    uint16_t status;
@@ -535,7 +535,7 @@ static uint32_t bonito_spciconf_readb(void *opaque, target_phys_addr_t addr) 
{

    PCIBonitoState *s = opaque;

    PCIDevice *d = PCI_DEVICE(s);

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost));

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);

    uint32_t pciaddr;

    uint16_t status;
@@ -561,7 +561,7 @@ static uint32_t bonito_spciconf_readw(void *opaque, target_phys_addr_t addr) 
{

    PCIBonitoState *s = opaque;

    PCIDevice *d = PCI_DEVICE(s);

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost));

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);

    uint32_t pciaddr;

    uint16_t status;
@@ -589,7 +589,7 @@ static uint32_t bonito_spciconf_readl(void *opaque, target_phys_addr_t addr) 
{

    PCIBonitoState *s = opaque;

    PCIDevice *d = PCI_DEVICE(s);

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(s->pcihost));

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);

    uint32_t pciaddr;

    uint16_t status;
@@ -702,7 +702,7 @@ static const VMStateDescription vmstate_bonito = { 


static int bonito_pcihost_initfn(SysBusDevice *dev)

{

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, dev);

    PCIHostState *phb = PCI_HOST_BRIDGE(dev);



    phb->bus = pci_register_bus(DEVICE(dev), "pci",

                                pci_bonito_set_irq, pci_bonito_map_irq, dev,
@@ -716,7 +716,7 @@ static int bonito_initfn(PCIDevice *dev) 
{

    PCIBonitoState *s = DO_UPCAST(PCIBonitoState, dev, dev);

    SysBusDevice *sysbus = SYS_BUS_DEVICE(s->pcihost);

    PCIHostState *phb = FROM_SYSBUS(PCIHostState, sysbus);

    PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost);



    /* Bonito North Bridge, built on FPGA, VENDOR_ID/DEVICE_ID are "undefined" */

    pci_config_set_prog_interface(dev->config, 0x00);
@@ -785,7 +785,7 @@ PCIBus *bonito_init(qemu_irq *pic) 
    PCIDevice *d;



    dev = qdev_create(NULL, TYPE_BONITO_PCI_HOST_BRIDGE);

    phb = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));

    phb = PCI_HOST_BRIDGE(dev);

    pcihost = BONITO_PCI_HOST_BRIDGE(dev);

    pcihost->pic = pic;

    qdev_init_nofail(dev);
@@ -833,7 +833,7 @@ static void bonito_pcihost_class_init(ObjectClass *klass, void *data) 


static const TypeInfo bonito_pcihost_info = {

    .name          = TYPE_BONITO_PCI_HOST_BRIDGE,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .parent        = TYPE_PCI_HOST_BRIDGE,

    .instance_size = sizeof(BonitoState),

    .class_init    = bonito_pcihost_class_init,

};

hw/dec_pci.c

+2 −2
Original line number Diff line number Diff line
@@ -91,7 +91,7 @@ static int pci_dec_21154_device_init(SysBusDevice *dev) 
{

    PCIHostState *phb;



    phb = FROM_SYSBUS(PCIHostState, dev);

    phb = PCI_HOST_BRIDGE(dev);



    memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,

                          dev, "pci-conf-idx", 0x1000);
@@ -136,7 +136,7 @@ static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data) 


static const TypeInfo pci_dec_21154_device_info = {

    .name          = TYPE_DEC_21154,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .parent        = TYPE_PCI_HOST_BRIDGE,

    .instance_size = sizeof(DECState),

    .class_init    = pci_dec_21154_device_class_init,

};

hw/grackle_pci.c

+3 −3
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic, 
    dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);

    qdev_init_nofail(dev);

    s = SYS_BUS_DEVICE(dev);

    phb = FROM_SYSBUS(PCIHostState, s);

    phb = PCI_HOST_BRIDGE(dev);

    d = GRACKLE_PCI_HOST_BRIDGE(dev);



    memory_region_init(&d->pci_mmio, "pci-mmio", 0x100000000ULL);
@@ -102,7 +102,7 @@ static int pci_grackle_init_device(SysBusDevice *dev) 
{

    PCIHostState *phb;



    phb = FROM_SYSBUS(PCIHostState, dev);

    phb = PCI_HOST_BRIDGE(dev);



    memory_region_init_io(&phb->conf_mem, &pci_host_conf_le_ops,

                          dev, "pci-conf-idx", 0x1000);
@@ -151,7 +151,7 @@ static void pci_grackle_class_init(ObjectClass *klass, void *data) 


static const TypeInfo grackle_pci_host_info = {

    .name          = TYPE_GRACKLE_PCI_HOST_BRIDGE,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .parent        = TYPE_PCI_HOST_BRIDGE,

    .instance_size = sizeof(GrackleState),

    .class_init    = pci_grackle_class_init,

};

hw/gt64xxx.c

+2 −2
Original line number Diff line number Diff line
@@ -1095,7 +1095,7 @@ PCIBus *gt64120_register(qemu_irq *pic) 
    dev = qdev_create(NULL, TYPE_GT64120_PCI_HOST_BRIDGE);

    qdev_init_nofail(dev);

    d = GT64120_PCI_HOST_BRIDGE(dev);

    phb = &d->pci;

    phb = PCI_HOST_BRIDGE(dev);

    phb->bus = pci_register_bus(dev, "pci",

                                gt64120_pci_set_irq, gt64120_pci_map_irq,

                                pic,
@@ -1168,7 +1168,7 @@ static void gt64120_class_init(ObjectClass *klass, void *data) 


static const TypeInfo gt64120_info = {

    .name          = TYPE_GT64120_PCI_HOST_BRIDGE,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .parent        = TYPE_PCI_HOST_BRIDGE,

    .instance_size = sizeof(GT64120State),

    .class_init    = gt64120_class_init,

};