Commit 6692aac4 authored by Vijaya Kumar K's avatar Vijaya Kumar K Committed by Peter Maydell
Browse files

hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate 



To Save and Restore ICC_SRE_EL1 register introduce vmstate
subsection and load only if non-zero.
Also initialize icc_sre_el1 with to 0x7 in pre_load
function.

Signed-off-by: default avatarVijaya Kumar K <Vijaya.Kumar@cavium.com>
Reviewed-by: default avatarPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: default avatarEric Auger <eric.auger@redhat.com>
Message-id: 1487850673-26455-3-git-send-email-vijay.kilari@gmail.com
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 3a5eb5b4

hw/intc/arm_gicv3_common.c

+36 −0
Original line number Diff line number Diff line
@@ -70,6 +70,38 @@ static const VMStateDescription vmstate_gicv3_cpu_virt = { 
    }

};



static int icc_sre_el1_reg_pre_load(void *opaque)

{

    GICv3CPUState *cs = opaque;



   /*

    * If the sre_el1 subsection is not transferred this

    * means SRE_EL1 is 0x7 (which might not be the same as

    * our reset value).

    */

    cs->icc_sre_el1 = 0x7;

    return 0;

}



static bool icc_sre_el1_reg_needed(void *opaque)

{

    GICv3CPUState *cs = opaque;



    return cs->icc_sre_el1 != 7;

}



const VMStateDescription vmstate_gicv3_cpu_sre_el1 = {

    .name = "arm_gicv3_cpu/sre_el1",

    .version_id = 1,

    .minimum_version_id = 1,

    .pre_load = icc_sre_el1_reg_pre_load,

    .needed = icc_sre_el1_reg_needed,

    .fields = (VMStateField[]) {

        VMSTATE_UINT64(icc_sre_el1, GICv3CPUState),

        VMSTATE_END_OF_LIST()

    }

};



static const VMStateDescription vmstate_gicv3_cpu = {

    .name = "arm_gicv3_cpu",

    .version_id = 1,
@@ -100,6 +132,10 @@ static const VMStateDescription vmstate_gicv3_cpu = { 
    .subsections = (const VMStateDescription * []) {

        &vmstate_gicv3_cpu_virt,

        NULL

    },

    .subsections = (const VMStateDescription * []) {

        &vmstate_gicv3_cpu_sre_el1,

        NULL

    }

};

include/hw/intc/arm_gicv3_common.h

+1 −0
Original line number Diff line number Diff line
@@ -172,6 +172,7 @@ struct GICv3CPUState { 
    uint8_t gicr_ipriorityr[GIC_INTERNAL];



    /* CPU interface */

    uint64_t icc_sre_el1;

    uint64_t icc_ctlr_el1[2];

    uint64_t icc_pmr_el1;

    uint64_t icc_bpr[3];