Commit 61c56c8c authored by Andreas Färber's avatar Andreas Färber
Browse files

mips hw/: Don't use CPUState 



Scripted conversion:
  for file in hw/mips_*.[hc]; do
    sed -i "s/CPUState/CPUMIPSState/g" $file
  done

Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
Acked-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
parent ee118507

hw/mips_cpudevs.h

+2 −2
Original line number Diff line number Diff line
@@ -7,9 +7,9 @@ uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr); 
uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr);



/* mips_int.c */

void cpu_mips_irq_init_cpu(CPUState *env);

void cpu_mips_irq_init_cpu(CPUMIPSState *env);



/* mips_timer.c */

void cpu_mips_clock_init(CPUState *);

void cpu_mips_clock_init(CPUMIPSState *);



#endif

hw/mips_fulong2e.c

+5 −5
Original line number Diff line number Diff line
@@ -102,7 +102,7 @@ static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index, 
    va_end(ap);

}



static int64_t load_kernel (CPUState *env)

static int64_t load_kernel (CPUMIPSState *env)

{

    int64_t kernel_entry, kernel_low, kernel_high;

    int index = 0;
@@ -168,7 +168,7 @@ static int64_t load_kernel (CPUState *env) 
    return kernel_entry;

}



static void write_bootloader (CPUState *env, uint8_t *base, int64_t kernel_addr)

static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)

{

    uint32_t *p;
@@ -198,7 +198,7 @@ static void write_bootloader (CPUState *env, uint8_t *base, int64_t kernel_addr) 


static void main_cpu_reset(void *opaque)

{

    CPUState *env = opaque;

    CPUMIPSState *env = opaque;



    cpu_state_reset(env);

    /* TODO: 2E reset stuff */
@@ -248,7 +248,7 @@ static void network_init (void) 


static void cpu_request_exit(void *opaque, int irq, int level)

{

    CPUState *env = cpu_single_env;

    CPUMIPSState *env = cpu_single_env;



    if (env && level) {

        cpu_exit(env);
@@ -272,7 +272,7 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, 
    i2c_bus *smbus;

    int i;

    DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];

    CPUState *env;

    CPUMIPSState *env;



    /* init CPUs */

    if (cpu_model == NULL) {

hw/mips_int.c

+3 −3
Original line number Diff line number Diff line
@@ -26,7 +26,7 @@ 


static void cpu_mips_irq_request(void *opaque, int irq, int level)

{

    CPUState *env = (CPUState *)opaque;

    CPUMIPSState *env = (CPUMIPSState *)opaque;



    if (irq < 0 || irq > 7)

        return;
@@ -44,7 +44,7 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) 
    }

}



void cpu_mips_irq_init_cpu(CPUState *env)

void cpu_mips_irq_init_cpu(CPUMIPSState *env)

{

    qemu_irq *qi;

    int i;
@@ -55,7 +55,7 @@ void cpu_mips_irq_init_cpu(CPUState *env) 
    }

}



void cpu_mips_soft_irq(CPUState *env, int irq, int level)

void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level)

{

    if (irq < 0 || irq > 2) {

        return;

hw/mips_jazz.c

+3 −3
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ enum jazz_model_e 


static void main_cpu_reset(void *opaque)

{

    CPUState *env = opaque;

    CPUMIPSState *env = opaque;

    cpu_state_reset(env);

}
@@ -97,7 +97,7 @@ static const MemoryRegionOps dma_dummy_ops = { 


static void cpu_request_exit(void *opaque, int irq, int level)

{

    CPUState *env = cpu_single_env;

    CPUMIPSState *env = cpu_single_env;



    if (env && level) {

        cpu_exit(env);
@@ -112,7 +112,7 @@ static void mips_jazz_init(MemoryRegion *address_space, 
{

    char *filename;

    int bios_size, n;

    CPUState *env;

    CPUMIPSState *env;

    qemu_irq *rc4030, *i8259;

    rc4030_dma *dmas;

    void* rc4030_opaque;

hw/mips_malta.c

+5 −5
Original line number Diff line number Diff line
@@ -500,7 +500,7 @@ static void network_init(void) 
     a3 - RAM size in bytes

*/



static void write_bootloader (CPUState *env, uint8_t *base,

static void write_bootloader (CPUMIPSState *env, uint8_t *base,

                              int64_t kernel_entry)

{

    uint32_t *p;
@@ -736,7 +736,7 @@ static int64_t load_kernel (void) 
    return kernel_entry;

}



static void malta_mips_config(CPUState *env)

static void malta_mips_config(CPUMIPSState *env)

{

    env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) |

                         ((smp_cpus * env->nr_threads - 1) << CP0MVPC0_PTC);
@@ -744,7 +744,7 @@ static void malta_mips_config(CPUState *env) 


static void main_cpu_reset(void *opaque)

{

    CPUState *env = opaque;

    CPUMIPSState *env = opaque;

    cpu_state_reset(env);



    /* The bootloader does not need to be rewritten as it is located in a
@@ -759,7 +759,7 @@ static void main_cpu_reset(void *opaque) 


static void cpu_request_exit(void *opaque, int irq, int level)

{

    CPUState *env = cpu_single_env;

    CPUMIPSState *env = cpu_single_env;



    if (env && level) {

        cpu_exit(env);
@@ -781,7 +781,7 @@ void mips_malta_init (ram_addr_t ram_size, 
    int64_t kernel_entry;

    PCIBus *pci_bus;

    ISABus *isa_bus;

    CPUState *env;

    CPUMIPSState *env;

    qemu_irq *isa_irq;

    qemu_irq *cpu_exit_irq;

    int piix4_devfn;