Commit ee118507 authored by Andreas Färber's avatar Andreas Färber
Browse files

microblaze hw/: Don't use CPUState 



Scripted conversion:
  for file in hw/microblaze_*.[hc] hw/petalogix_ml605_mmu.c hw/petalogix_s3adsp1800_mmu.c; do
    sed -i "s/CPUState/CPUMBState/g" $file
  done

Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
Acked-by: default avatarAnthony Liguori <aliguori@us.ibm.com>
parent 7927df3a

hw/microblaze_boot.c

+4 −4
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ 


static struct

{

    void (*machine_cpu_reset)(CPUState *);

    void (*machine_cpu_reset)(CPUMBState *);

    uint32_t bootstrap_pc;

    uint32_t cmdline;

    uint32_t fdt;
@@ -43,7 +43,7 @@ static struct 


static void main_cpu_reset(void *opaque)

{

    CPUState *env = opaque;

    CPUMBState *env = opaque;



    cpu_state_reset(env);

    env->regs[5] = boot_info.cmdline;
@@ -99,9 +99,9 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr) 
    return addr - 0x30000000LL;

}



void microblaze_load_kernel(CPUState *env, target_phys_addr_t ddr_base,

void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base,

                            uint32_t ramsize, const char *dtb_filename,

                                  void (*machine_cpu_reset)(CPUState *))

                                  void (*machine_cpu_reset)(CPUMBState *))

{



    QemuOpts *machine_opts;

hw/microblaze_boot.h

+2 −2
Original line number Diff line number Diff line
@@ -3,8 +3,8 @@ 


#include "hw.h"



void microblaze_load_kernel(CPUState *env, target_phys_addr_t ddr_base,

void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base,

                            uint32_t ramsize, const char *dtb_filename,

                                  void (*machine_cpu_reset)(CPUState *));

                                  void (*machine_cpu_reset)(CPUMBState *));



#endif /* __MICROBLAZE_BOOT __ */

hw/microblaze_pic_cpu.c

+2 −2
Original line number Diff line number Diff line
@@ -29,7 +29,7 @@ 


static void microblaze_pic_cpu_handler(void *opaque, int irq, int level)

{

    CPUState *env = (CPUState *)opaque;

    CPUMBState *env = (CPUMBState *)opaque;

    int type = irq ? CPU_INTERRUPT_NMI : CPU_INTERRUPT_HARD;



    if (level)
@@ -38,7 +38,7 @@ static void microblaze_pic_cpu_handler(void *opaque, int irq, int level) 
        cpu_reset_interrupt(env, type);

}



qemu_irq *microblaze_pic_init_cpu(CPUState *env)

qemu_irq *microblaze_pic_init_cpu(CPUMBState *env)

{

    return qemu_allocate_irqs(microblaze_pic_cpu_handler, env, 2);

}

hw/microblaze_pic_cpu.h

+1 −1
Original line number Diff line number Diff line
@@ -3,6 +3,6 @@ 


#include "qemu-common.h"



qemu_irq *microblaze_pic_init_cpu(CPUState *env);

qemu_irq *microblaze_pic_init_cpu(CPUMBState *env);



#endif /*  MICROBLAZE_PIC_CPU_H */

hw/petalogix_ml605_mmu.c

+2 −2
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@ 
#define AXIENET_BASEADDR 0x82780000

#define AXIDMA_BASEADDR 0x84600000



static void machine_cpu_reset(CPUState *env)

static void machine_cpu_reset(CPUMBState *env)

{

    env->pvr.regs[10] = 0x0e000000; /* virtex 6 */

    /* setup pvr to match kernel setting */
@@ -75,7 +75,7 @@ petalogix_ml605_init(ram_addr_t ram_size, 
{

    MemoryRegion *address_space_mem = get_system_memory();

    DeviceState *dev;

    CPUState *env;

    CPUMBState *env;

    DriveInfo *dinfo;

    int i;

    target_phys_addr_t ddr_base = MEMORY_BASEADDR;