Commit 508ba0f7 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20171109' into staging 



s390x changes: let pci devices start out in a usable state, and make
RISBGN work in tcg.

# gpg: Signature made Thu 09 Nov 2017 15:27:21 GMT
# gpg:                using RSA key 0xDECF6B93C6F02FAF
# gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>"
# gpg:                 aka "Cornelia Huck <huckc@linux.vnet.ibm.com>"
# gpg:                 aka "Cornelia Huck <cornelia.huck@de.ibm.com>"
# gpg:                 aka "Cornelia Huck <cohuck@kernel.org>"
# gpg:                 aka "Cornelia Huck <cohuck@redhat.com>"
# Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0  18CE DECF 6B93 C6F0 2FAF

* remotes/cohuck/tags/s390x-20171109:
  target/s390x: Finish implementing RISBGN
  s390x/pci: let pci devices start in configured mode

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 6b8d0ac0 fdaae351

hw/s390x/s390-pci-bus.c

+1 −1
Original line number Diff line number Diff line
@@ -715,7 +715,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotplug_dev, 
        pbdev->pdev = pdev;

        pbdev->iommu = s390_pci_get_iommu(s, pdev->bus, pdev->devfn);

        pbdev->iommu->pbdev = pbdev;

        pbdev->state = ZPCI_FS_STANDBY;

        pbdev->state = ZPCI_FS_DISABLED;



        if (s390_pci_msix_init(pbdev)) {

            error_setg(errp, "MSI-X support is mandatory "

target/s390x/translate.c

+3 −6
Original line number Diff line number Diff line
@@ -3432,6 +3432,7 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o) 
    /* Adjust the arguments for the specific insn.  */

    switch (s->fields->op2) {

    case 0x55: /* risbg */

    case 0x59: /* risbgn */

        i3 &= 63;

        i4 &= 63;

        pmask = ~0;
@@ -3447,7 +3448,7 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o) 
        pmask = 0x00000000ffffffffull;

        break;

    default:

        abort();

        g_assert_not_reached();

    }



    /* MASK is the set of bits to be inserted from R2.
@@ -3464,12 +3465,8 @@ static ExitStatus op_risbg(DisasContext *s, DisasOps *o) 
       insns, we need to keep the other half of the register.  */

    imask = ~mask | ~pmask;

    if (do_zero) {

        if (s->fields->op2 == 0x55) {

            imask = 0;

        } else {

        imask = ~pmask;

    }

    }



    len = i4 - i3 + 1;

    pos = 63 - i4;