Unverified Commit 4cc16b3b authored by Richard Henderson's avatar Richard Henderson Committed by Palmer Dabbelt
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target/riscv: Add checks for several RVC reserved operands 



C.ADDI16SP, C.LWSP, C.JR, C.ADDIW, C.LDSP all have reserved
operands that were not diagnosed.

Signed-off-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Reviewed-by: default avatarPalmer Dabbelt <palmer@sifive.com>
Signed-off-by: default avatarPalmer Dabbelt <palmer@sifive.com>
parent e0643110

target/riscv/insn16-64.decode

+8 −2
Original line number Diff line number Diff line
@@ -21,10 +21,16 @@ ld 011 ... ... .. ... 00 @cl_d 
sd                111  ... ... .. ... 00 @cs_d



# *** RV64C Standard Extension (Quadrant 1) ***

{

  illegal         001 -  00000  ----- 01 # c.addiw, RES rd=0

  addiw           001 .  .....  ..... 01 @ci

}

subw              100 1 11 ... 00 ... 01 @cs_2

addw              100 1 11 ... 01 ... 01 @cs_2



# *** RV64C Standard Extension (Quadrant 2) ***

{

  illegal         011 -  00000  ----- 10 # c.ldsp, RES rd=0

  ld              011 .  .....  ..... 10 @c_ldsp

}

sd                111 .  .....  ..... 10 @c_sdsp

target/riscv/insn16.decode

+6 −1
Original line number Diff line number Diff line
@@ -96,6 +96,7 @@ sw 110 ... ... .. ... 00 @cs_w 
addi              000 .  .....  ..... 01 @ci

addi              010 .  .....  ..... 01 @c_li

{

  illegal         011 0  -----  00000 01 # c.addi16sp and c.lui, RES nzimm=0

  addi            011 .  00010  ..... 01 @c_addi16sp

  lui             011 .  .....  ..... 01 @c_lui

}
@@ -113,8 +114,12 @@ bne 111 ... ... ..... 01 @cb_z 
# *** RV32/64C Standard Extension (Quadrant 2) ***

slli              000 .  .....  ..... 10 @c_shift2

fld               001 .  .....  ..... 10 @c_ldsp

{

  illegal         010 -  00000  ----- 10 # c.lwsp, RES rd=0

  lw              010 .  .....  ..... 10 @c_lwsp

}

{

  illegal         100 0  00000  00000 10 # c.jr, RES rs1=0

  jalr            100 0  .....  00000 10 @c_jalr rd=0  # C.JR

  addi            100 0  .....  ..... 10 @c_mv

}