Commit 4500ede4 authored by David Hildenbrand's avatar David Hildenbrand
Browse files

s390x/tcg: Implement VECTOR LOAD ROUNDED 



We can reuse some of the infrastructure introduced for
VECTOR FP CONVERT FROM FIXED 64-BIT and friends.

Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarDavid Hildenbrand <david@redhat.com>
parent 1a76e59d

target/s390x/helper.h

+2 −0
Original line number Diff line number Diff line
@@ -280,6 +280,8 @@ DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32) 
DEF_HELPER_FLAGS_4(gvec_vfi64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vfll32s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vflr64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vflr64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)



#ifndef CONFIG_USER_ONLY

DEF_HELPER_3(servc, i32, env, i64, i64)

target/s390x/insn-data.def

+2 −0
Original line number Diff line number Diff line
@@ -1232,6 +1232,8 @@ 
    F(0xe7c7, VFI,     VRR_a, V,   0, 0, 0, 0, vcdg, 0, IF_VEC)

/* VECTOR LOAD LENGTHENED */

    F(0xe7c4, VFLL,    VRR_a, V,   0, 0, 0, 0, vfll, 0, IF_VEC)

/* VECTOR LOAD ROUNDED */

    F(0xe7c5, VFLR,    VRR_a, V,   0, 0, 0, 0, vcdg, 0, IF_VEC)



#ifndef CONFIG_USER_ONLY

/* COMPARE AND SWAP AND PURGE */

target/s390x/translate_vx.inc.c

+3 −0
Original line number Diff line number Diff line
@@ -2672,6 +2672,9 @@ static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o) 
    case 0xc7:

        fn = se ? gen_helper_gvec_vfi64s : gen_helper_gvec_vfi64;

        break;

    case 0xc5:

        fn = se ? gen_helper_gvec_vflr64s : gen_helper_gvec_vflr64;

        break;

    default:

        g_assert_not_reached();

    }

target/s390x/vec_fpu_helper.c

+43 −0
Original line number Diff line number Diff line
@@ -444,3 +444,46 @@ void HELPER(gvec_vfll32s)(void *v1, const void *v2, CPUS390XState *env, 
{

    vfll32(v1, v2, env, true, GETPC());

}



static void vflr64(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,

                   bool s, bool XxC, uint8_t erm, uintptr_t retaddr)

{

    uint8_t vxc, vec_exc = 0;

    S390Vector tmp = {};

    int i, old_mode;



    old_mode = s390_swap_bfp_rounding_mode(env, erm);

    for (i = 0; i < 2; i++) {

        float64 a = s390_vec_read_element64(v2, i);

        uint32_t ret = float64_to_float32(a, &env->fpu_status);



        /* place at even element */

        s390_vec_write_element32(&tmp, i * 2, ret);

        /* indicate the source element */

        vxc = check_ieee_exc(env, i, XxC, &vec_exc);

        if (s || vxc) {

            break;

        }

    }

    s390_restore_bfp_rounding_mode(env, old_mode);

    handle_ieee_exc(env, vxc, vec_exc, retaddr);

    *v1 = tmp;

}



void HELPER(gvec_vflr64)(void *v1, const void *v2, CPUS390XState *env,

                         uint32_t desc)

{

    const uint8_t erm = extract32(simd_data(desc), 4, 4);

    const bool XxC = extract32(simd_data(desc), 2, 1);



    vflr64(v1, v2, env, false, XxC, erm, GETPC());

}



void HELPER(gvec_vflr64s)(void *v1, const void *v2, CPUS390XState *env,

                          uint32_t desc)

{

    const uint8_t erm = extract32(simd_data(desc), 4, 4);

    const bool XxC = extract32(simd_data(desc), 2, 1);



    vflr64(v1, v2, env, true, XxC, erm, GETPC());

}