Commit 1a76e59d authored by David Hildenbrand's avatar David Hildenbrand
Browse files

s390x/tcg: Implement VECTOR LOAD LENGTHENED 



Take care of reading/indicating the 32-bit elements.

Reviewed-by: default avatarRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: default avatarDavid Hildenbrand <david@redhat.com>
parent 60d0ab29

target/s390x/helper.h

+2 −0
Original line number Diff line number Diff line
@@ -278,6 +278,8 @@ DEF_HELPER_FLAGS_5(gvec_vfd64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32) 
DEF_HELPER_FLAGS_5(gvec_vfd64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vfi64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vfi64s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vfll32, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)

DEF_HELPER_FLAGS_4(gvec_vfll32s, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)



#ifndef CONFIG_USER_ONLY

DEF_HELPER_3(servc, i32, env, i64, i64)

target/s390x/insn-data.def

+2 −0
Original line number Diff line number Diff line
@@ -1230,6 +1230,8 @@ 
    F(0xe7e5, VFD,     VRR_c, V,   0, 0, 0, 0, vfa, 0, IF_VEC)

/* VECTOR LOAD FP INTEGER */

    F(0xe7c7, VFI,     VRR_a, V,   0, 0, 0, 0, vcdg, 0, IF_VEC)

/* VECTOR LOAD LENGTHENED */

    F(0xe7c4, VFLL,    VRR_a, V,   0, 0, 0, 0, vfll, 0, IF_VEC)



#ifndef CONFIG_USER_ONLY

/* COMPARE AND SWAP AND PURGE */

target/s390x/translate_vx.inc.c

+19 −0
Original line number Diff line number Diff line
@@ -2679,3 +2679,22 @@ static DisasJumpType op_vcdg(DisasContext *s, DisasOps *o) 
                   deposit32(m4, 4, 4, erm), fn);

    return DISAS_NEXT;

}



static DisasJumpType op_vfll(DisasContext *s, DisasOps *o)

{

    const uint8_t fpf = get_field(s->fields, m3);

    const uint8_t m4 = get_field(s->fields, m4);

    gen_helper_gvec_2_ptr *fn = gen_helper_gvec_vfll32;



    if (fpf != FPF_SHORT || extract32(m4, 0, 3)) {

        gen_program_exception(s, PGM_SPECIFICATION);

        return DISAS_NORETURN;

    }



    if (extract32(m4, 3, 1)) {

        fn = gen_helper_gvec_vfll32s;

    }

    gen_gvec_2_ptr(get_field(s->fields, v1), get_field(s->fields, v2), cpu_env,

                   0, fn);

    return DISAS_NEXT;

}

target/s390x/vec_fpu_helper.c

+35 −0
Original line number Diff line number Diff line
@@ -409,3 +409,38 @@ void HELPER(gvec_vfi64s)(void *v1, const void *v2, CPUS390XState *env, 


    vop64_2(v1, v2, env, true, XxC, erm, vfi64, GETPC());

}



static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,

                   bool s, uintptr_t retaddr)

{

    uint8_t vxc, vec_exc = 0;

    S390Vector tmp = {};

    int i;



    for (i = 0; i < 2; i++) {

        /* load from even element */

        const float32 a = s390_vec_read_element32(v2, i * 2);

        const uint64_t ret = float32_to_float64(a, &env->fpu_status);



        s390_vec_write_element64(&tmp, i, ret);

        /* indicate the source element */

        vxc = check_ieee_exc(env, i * 2, false, &vec_exc);

        if (s || vxc) {

            break;

        }

    }

    handle_ieee_exc(env, vxc, vec_exc, retaddr);

    *v1 = tmp;

}



void HELPER(gvec_vfll32)(void *v1, const void *v2, CPUS390XState *env,

                         uint32_t desc)

{

    vfll32(v1, v2, env, false, GETPC());

}



void HELPER(gvec_vfll32s)(void *v1, const void *v2, CPUS390XState *env,

                          uint32_t desc)

{

    vfll32(v1, v2, env, true, GETPC());

}