Commit 3ee01413 authored by Max Filippov's avatar Max Filippov
Browse files

tests/tcg/xtensa: add test for failed memory transactions 



Failed memory transactions should raise exceptions 14 (for fetch) or 15
(for load/store) with XEA2.

Memory accesses that result in TLB miss followed by an attempt to load
PTE from physical memory which fails should raise InstTLBMiss or
LoadStoreTLBMiss with XEA2.

Signed-off-by: default avatarMax Filippov <jcmvbkbc@gmail.com>
parent 76b7dd64

tests/tcg/xtensa/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ TESTCASES += test_mmu.tst 
TESTCASES += test_mul16.tst

TESTCASES += test_mul32.tst

TESTCASES += test_nsa.tst

TESTCASES += test_phys_mem.tst

ifdef XT

TESTCASES += test_pipeline.tst

endif

tests/tcg/xtensa/test_phys_mem.S

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+124 −0
Original line number Diff line number Diff line 
#include "macros.inc"



test_suite phys_mem



.purgem test_init



.macro test_init

    movi    a2, 0xc0000003 /* PPN */

    movi    a3, 0xc0000004 /* VPN */

    wdtlb   a2, a3

    witlb   a2, a3

    movi    a2, 0xc0000000

    wsr     a2, ptevaddr

.endm



test inst_fetch_get_pte_no_phys

    set_vector kernel, 2f



    movi    a2, 0x20000000

    jx      a2

2:

    movi    a2, 0x20000000

    rsr     a3, excvaddr

    assert  eq, a2, a3

    rsr     a3, epc1

    assert  eq, a2, a3

    rsr     a3, exccause

    movi    a2, 16

    assert  eq, a2, a3

test_end



test read_get_pte_no_phys

    set_vector kernel, 2f



    movi    a2, 0x20000000

1:

    l32i    a3, a2, 0

    test_fail

2:

    movi    a2, 0x20000000

    rsr     a3, excvaddr

    assert  eq, a2, a3

    movi    a2, 1b

    rsr     a3, epc1

    assert  eq, a2, a3

    rsr     a3, exccause

    movi    a2, 24

    assert  eq, a2, a3

test_end



test write_get_pte_no_phys

    set_vector kernel, 2f



    movi    a2, 0x20000000

1:

    s32i    a3, a2, 0

    test_fail

2:

    movi    a2, 0x20000000

    rsr     a3, excvaddr

    assert  eq, a2, a3

    movi    a2, 1b

    rsr     a3, epc1

    assert  eq, a2, a3

    rsr     a3, exccause

    movi    a2, 24

    assert  eq, a2, a3

test_end



test inst_fetch_no_phys

    set_vector kernel, 2f



    movi    a2, 0xc0000000

    jx      a2

2:

    movi    a2, 0xc0000000

    rsr     a3, excvaddr

    assert  eq, a2, a3

    rsr     a3, epc1

    assert  eq, a2, a3

    rsr     a3, exccause

    movi    a2, 14

    assert  eq, a2, a3

test_end



test read_no_phys

    set_vector kernel, 2f



    movi    a2, 0xc0000000

1:

    l32i    a3, a2, 0

    test_fail

2:

    movi    a2, 0xc0000000

    rsr     a3, excvaddr

    assert  eq, a2, a3

    movi    a2, 1b

    rsr     a3, epc1

    assert  eq, a2, a3

    rsr     a3, exccause

    movi    a2, 15

    assert  eq, a2, a3

test_end



test write_no_phys

    set_vector kernel, 2f



    movi    a2, 0xc0000000

1:

    s32i    a3, a2, 0

    test_fail

2:

    movi    a2, 0xc0000000

    rsr     a3, excvaddr

    assert  eq, a2, a3

    movi    a2, 1b

    rsr     a3, epc1

    assert  eq, a2, a3

    rsr     a3, exccause

    movi    a2, 15

    assert  eq, a2, a3

test_end



test_suite_end