Commit 3df2b8fd authored by Stefan Weil's avatar Stefan Weil
Browse files

misc: Use new rotate functions 



Signed-off-by: default avatarStefan Weil <sw@weilnetz.de>
parent 6aa25b4a

target-arm/iwmmxt_helper.c

+1 −1
Original line number Diff line number Diff line
@@ -577,7 +577,7 @@ uint64_t HELPER(iwmmxt_rorl)(CPUARMState *env, uint64_t x, uint32_t n) 


uint64_t HELPER(iwmmxt_rorq)(CPUARMState *env, uint64_t x, uint32_t n)

{

    x = (x >> n) | (x << (64 - n));

    x = ror64(x, n);

    env->iwmmxt.cregs[ARM_IWMMXT_wCASF] = NZBIT64(x);

    return x;

}

tcg/optimize.c

+4 −8
Original line number Diff line number Diff line
@@ -238,20 +238,16 @@ static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) 
        return (int64_t)x >> (int64_t)y;



    case INDEX_op_rotr_i32:

        x = ((uint32_t)x << (32 - y)) | ((uint32_t)x >> y);

        return x;

        return ror32(x, y);



    case INDEX_op_rotr_i64:

        x = ((uint64_t)x << (64 - y)) | ((uint64_t)x >> y);

        return x;

        return ror64(x, y);



    case INDEX_op_rotl_i32:

        x = ((uint32_t)x << y) | ((uint32_t)x >> (32 - y));

        return x;

        return rol32(x, y);



    case INDEX_op_rotl_i64:

        x = ((uint64_t)x << y) | ((uint64_t)x >> (64 - y));

        return x;

        return rol64(x, y);



    CASE_OP_32_64(not):

        return ~x;

tci.c

+4 −4
Original line number Diff line number Diff line
@@ -688,13 +688,13 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) 
            t0 = *tb_ptr++;

            t1 = tci_read_ri32(&tb_ptr);

            t2 = tci_read_ri32(&tb_ptr);

            tci_write_reg32(t0, (t1 << t2) | (t1 >> (32 - t2)));

            tci_write_reg32(t0, rol32(t1, t2));

            break;

        case INDEX_op_rotr_i32:

            t0 = *tb_ptr++;

            t1 = tci_read_ri32(&tb_ptr);

            t2 = tci_read_ri32(&tb_ptr);

            tci_write_reg32(t0, (t1 >> t2) | (t1 << (32 - t2)));

            tci_write_reg32(t0, ror32(t1, t2));

            break;

#endif

#if TCG_TARGET_HAS_deposit_i32
@@ -955,13 +955,13 @@ uintptr_t tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr) 
            t0 = *tb_ptr++;

            t1 = tci_read_ri64(&tb_ptr);

            t2 = tci_read_ri64(&tb_ptr);

            tci_write_reg64(t0, (t1 << t2) | (t1 >> (64 - t2)));

            tci_write_reg64(t0, rol64(t1, t2));

            break;

        case INDEX_op_rotr_i64:

            t0 = *tb_ptr++;

            t1 = tci_read_ri64(&tb_ptr);

            t2 = tci_read_ri64(&tb_ptr);

            tci_write_reg64(t0, (t1 >> t2) | (t1 << (64 - t2)));

            tci_write_reg64(t0, ror64(t1, t2));

            break;

#endif

#if TCG_TARGET_HAS_deposit_i64