Commit 3d5c84ff authored by Sergey Fedorov's avatar Sergey Fedorov Committed by Peter Maydell
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target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabled 



Signed-off-by: default avatarSergey Fedorov <serge.fdrv@gmail.com>
Message-id: 1429669112-29835-1-git-send-email-serge.fdrv@gmail.com
Reviewed-by: default avatarGreg Bellows <greg.bellows@linaro.org>
Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parent 7ebd5f2e

target-arm/cpu.c

+2 −1
Original line number Diff line number Diff line
@@ -524,9 +524,10 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) 
        unset_feature(env, ARM_FEATURE_EL3);



        /* Disable the security extension feature bits in the processor feature

         * register as well.  This is id_pfr1[7:4].

         * registers as well. These are id_pfr1[7:4] and id_aa64pfr0[15:12].

         */

        cpu->id_pfr1 &= ~0xf0;

        cpu->id_aa64pfr0 &= ~0xf000;

    }



    register_cp_regs_for_features(cpu);