Commit 3988982c authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging 

QOM CPUState refactorings

* Fix NULL pointer dereference in gdbstub
* Introduce vaddr type
* Introduce CPUClass::set_pc()
* Introduce CPUClass::synchronize_from_tb()
* Introduce CPUClass::get_phys_page_debug()
* Introduce CPUClass::memory_rw_debug()
* Move singlestep_enabled and gdb_regs fields out of CPU_COMMON
* Adopt CPUState in more APIs
* Propagate CPUState in gdbstub

# gpg: Signature made Mon 22 Jul 2013 07:50:17 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Andreas Färber (21) and others
# Via Andreas Färber
* afaerber/tags/qom-cpu-for-anthony: (24 commits)
  linux-user: Use X86CPU property to retrieve CPUID family
  gdbstub: Change gdb_register_coprocessor() argument to CPUState
  cpu: Move gdb_regs field from CPU_COMMON to CPUState
  gdbstub: Change GDBState::{c,g}_cpu and find_cpu() to CPUState
  cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug()
  exec: Change cpu_memory_rw_debug() argument to CPUState
  cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
  gdbstub: Change gdb_{read,write}_register() argument to CPUState
  gdbstub: Change gdb_handlesig() argument to CPUState
  gdbstub: Change syscall callback argument to CPUState
  kvm: Change kvm_{insert,remove}_breakpoint() argument to CPUState
  cpu: Change cpu_single_step() argument to CPUState
  gdbstub: Update gdb_handlesig() and gdb_signalled() Coding Style
  cpu: Move singlestep_enabled field from CPU_COMMON to CPUState
  target-alpha: Copy implver to DisasContext
  target-alpha: Copy singlestep_enabled to DisasContext
  cpu: Introduce CPUClass::synchronize_from_tb() for cpu_pc_from_tb()
  target-unicore32: Implement CPUClass::set_pc()
  target-moxie: Implement CPUClass::set_pc()
  target-m68k: Implement CPUClass::set_pc()
  ...
parents 931f0adf 6f152e9b

HACKING

+17 −2
Original line number Diff line number Diff line
@@ -40,8 +40,23 @@ speaking, the size of guest memory can always fit into ram_addr_t but 
it would not be correct to store an actual guest physical address in a

ram_addr_t.



Use target_ulong (or abi_ulong) for CPU virtual addresses, however

devices should not need to use target_ulong.

For CPU virtual addresses there are several possible types.

vaddr is the best type to use to hold a CPU virtual address in

target-independent code. It is guaranteed to be large enough to hold a

virtual address for any target, and it does not change size from target

to target. It is always unsigned.

target_ulong is a type the size of a virtual address on the CPU; this means

it may be 32 or 64 bits depending on which target is being built. It should

therefore be used only in target-specific code, and in some

performance-critical built-per-target core code such as the TLB code.

There is also a signed version, target_long.

abi_ulong is for the *-user targets, and represents a type the size of

'void *' in that target's ABI. (This may not be the same as the size of a

full CPU virtual address in the case of target ABIs which use 32 bit pointers

on 64 bit CPUs, like sparc32plus.) Definitions of structures that must match

the target's ABI must use this type for anything that on the target is defined

to be an 'unsigned long' or a pointer type.

There is also a signed version, abi_long.



Of course, take all of the above with a grain of salt.  If you're about

to use some system interface that requires a type like size_t, pid_t or

bsd-user/main.c

+6 −4
Original line number Diff line number Diff line
@@ -643,7 +643,7 @@ void cpu_loop(CPUSPARCState *env) 
            {

                int sig;



                sig = gdb_handlesig (env, TARGET_SIGTRAP);

                sig = gdb_handlesig(cs, TARGET_SIGTRAP);

#if 0

                if (sig)

                  {
@@ -738,6 +738,7 @@ int main(int argc, char **argv) 
    struct image_info info1, *info = &info1;

    TaskState ts1, *ts = &ts1;

    CPUArchState *env;

    CPUState *cpu;

    int optind;

    const char *r;

    int gdbstub_port = 0;
@@ -912,10 +913,11 @@ int main(int argc, char **argv) 
        fprintf(stderr, "Unable to find CPU definition\n");

        exit(1);

    }

    cpu = ENV_GET_CPU(env);

#if defined(TARGET_SPARC) || defined(TARGET_PPC)

    cpu_reset(ENV_GET_CPU(env));

    cpu_reset(cpu);

#endif

    thread_cpu = ENV_GET_CPU(env);

    thread_cpu = cpu;



    if (getenv("QEMU_STRACE")) {

        do_strace = 1;
@@ -1134,7 +1136,7 @@ int main(int argc, char **argv) 


    if (gdbstub_port) {

        gdbserver_start (gdbstub_port);

        gdb_handlesig(env, 0);

        gdb_handlesig(cpu, 0);

    }

    cpu_loop(env);

    /* never exits */

cpu-exec.c

+8 −2
Original line number Diff line number Diff line
@@ -59,8 +59,14 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, uint8_t *tb_ptr) 
         * counter hit zero); we must restore the guest PC to the address

         * of the start of the TB.

         */

        CPUClass *cc = CPU_GET_CLASS(cpu);

        TranslationBlock *tb = (TranslationBlock *)(next_tb & ~TB_EXIT_MASK);

        cpu_pc_from_tb(env, tb);

        if (cc->synchronize_from_tb) {

            cc->synchronize_from_tb(cpu, tb);

        } else {

            assert(cc->set_pc);

            cc->set_pc(cpu, tb->pc);

        }

    }

    if ((next_tb & TB_EXIT_MASK) == TB_EXIT_REQUESTED) {

        /* We were asked to stop executing TBs (probably a pending
@@ -291,7 +297,7 @@ int cpu_exec(CPUArchState *env) 
            for(;;) {

                interrupt_request = cpu->interrupt_request;

                if (unlikely(interrupt_request)) {

                    if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) {

                    if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {

                        /* Mask out external interrupts for this step. */

                        interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;

                    }

cpus.c

+2 −4
Original line number Diff line number Diff line
@@ -1186,7 +1186,7 @@ static void tcg_exec_all(void) 
        CPUArchState *env = cpu->env_ptr;



        qemu_clock_enable(vm_clock,

                          (env->singlestep_enabled & SSTEP_NOTIMER) == 0);

                          (cpu->singlestep_enabled & SSTEP_NOTIMER) == 0);



        if (cpu_can_run(cpu)) {

            r = tcg_cpu_exec(env);
@@ -1285,7 +1285,6 @@ void qmp_memsave(int64_t addr, int64_t size, const char *filename, 
{

    FILE *f;

    uint32_t l;

    CPUArchState *env;

    CPUState *cpu;

    uint8_t buf[1024];
@@ -1299,7 +1298,6 @@ void qmp_memsave(int64_t addr, int64_t size, const char *filename, 
                  "a CPU number");

        return;

    }

    env = cpu->env_ptr;



    f = fopen(filename, "wb");

    if (!f) {
@@ -1311,7 +1309,7 @@ void qmp_memsave(int64_t addr, int64_t size, const char *filename, 
        l = sizeof(buf);

        if (l > size)

            l = size;

        cpu_memory_rw_debug(env, addr, buf, l, 0);

        cpu_memory_rw_debug(cpu, addr, buf, l, 0);

        if (fwrite(buf, 1, l, f) != l) {

            error_set(errp, QERR_IO_ERROR);

            goto exit;

disas.c

+2 −2
Original line number Diff line number Diff line
@@ -39,7 +39,7 @@ target_read_memory (bfd_vma memaddr, 
{

    CPUDebug *s = container_of(info, CPUDebug, info);



    cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0);

    cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);

    return 0;

}
@@ -392,7 +392,7 @@ monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length, 
    if (monitor_disas_is_physical) {

        cpu_physical_memory_read(memaddr, myaddr, length);

    } else {

        cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0);

        cpu_memory_rw_debug(ENV_GET_CPU(s->env), memaddr, myaddr, length, 0);

    }

    return 0;

}