Commit 931f0adf authored by Anthony Liguori's avatar Anthony Liguori
Browse files

Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging 

QOM device refactorings

* Avoid TYPE_* in VMStateDescription name
* Replace some DO_UPCAST()s and FROM_SYSBUS()s with QOM casts
* Limit legacy SCSI command line handling to non-hotplugged devices
* Replace some SysBusDeviceClass::init with DeviceClass::realize

# gpg: Signature made Mon 22 Jul 2013 06:31:42 PM CDT using RSA key ID 3E7E013F
# gpg: Can't check signature: public key not found

# By Hu Tao (26) and others
# Via Andreas Färber
* afaerber/tags/qom-devices-for-anthony: (55 commits)
  isa-bus: Drop isabus_bridge_init() since it does nothing
  ioapic: Use QOM realize for ioapic
  kvmvapic: Use QOM realize
  kvm/clock: Use QOM realize for kvmclock
  hpet: Use QOM realize for hpet
  scsi: Improve error propagation for scsi_bus_legacy_handle_cmdline()
  megasas: Legacy command line handling fix
  scsi/esp: Use QOM realize for scsi esp
  fw_cfg: Use QOM realize for fw_cfg
  ahci: Use QOM realize for ahci
  pflash_cfi02: Use QOM realize for pflash_cfi02
  pflash_cfi01: Use QOM realize for pflash_cfi01
  fdc: Improve error propagation for QOM realize
  fdc: Use QOM realize for fdc
  kvm/clock: QOM'ify some more
  hpet: QOM'ify some more
  scsi/esp: QOM'ify some more
  fwcfg: QOM'ify some more
  ahci: QOM'ify some more
  pflash-cfi02: QOM'ify some more
  ...
parents 3464700f 52785d99

hw/acpi/piix4.c

+37 −26
Original line number Diff line number Diff line
@@ -64,7 +64,9 @@ typedef struct CPUStatus { 
} CPUStatus;



typedef struct PIIX4PMState {

    PCIDevice dev;

    /*< private >*/

    PCIDevice parent_obj;

    /*< public >*/



    MemoryRegion io;

    MemoryRegion io_gpe;
@@ -96,6 +98,11 @@ typedef struct PIIX4PMState { 
    Notifier cpu_added_notifier;

} PIIX4PMState;



#define TYPE_PIIX4_PM "PIIX4_PM"



#define PIIX4_PM(obj) \

    OBJECT_CHECK(PIIX4PMState, (obj), TYPE_PIIX4_PM)



static void piix4_acpi_system_hot_add_init(MemoryRegion *parent,

                                           PCIBus *bus, PIIX4PMState *s);
@@ -130,11 +137,12 @@ static void pm_tmr_timer(ACPIREGS *ar) 
static void apm_ctrl_changed(uint32_t val, void *arg)

{

    PIIX4PMState *s = arg;

    PCIDevice *d = PCI_DEVICE(s);



    /* ACPI specs 3.0, 4.7.2.5 */

    acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE);



    if (s->dev.config[0x5b] & (1 << 1)) {

    if (d->config[0x5b] & (1 << 1)) {

        if (s->smi_irq) {

            qemu_irq_raise(s->smi_irq);

        }
@@ -143,24 +151,27 @@ static void apm_ctrl_changed(uint32_t val, void *arg) 


static void pm_io_space_update(PIIX4PMState *s)

{

    PCIDevice *d = PCI_DEVICE(s);

    uint32_t pm_io_base;



    pm_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x40));

    pm_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40));

    pm_io_base &= 0xffc0;



    memory_region_transaction_begin();

    memory_region_set_enabled(&s->io, s->dev.config[0x80] & 1);

    memory_region_set_enabled(&s->io, d->config[0x80] & 1);

    memory_region_set_address(&s->io, pm_io_base);

    memory_region_transaction_commit();

}



static void smbus_io_space_update(PIIX4PMState *s)

{

    s->smb_io_base = le32_to_cpu(*(uint32_t *)(s->dev.config + 0x90));

    PCIDevice *d = PCI_DEVICE(s);



    s->smb_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x90));

    s->smb_io_base &= 0xffc0;



    memory_region_transaction_begin();

    memory_region_set_enabled(&s->smb.io, s->dev.config[0xd2] & 1);

    memory_region_set_enabled(&s->smb.io, d->config[0xd2] & 1);

    memory_region_set_address(&s->smb.io, s->smb_io_base);

    memory_region_transaction_commit();

}
@@ -239,7 +250,7 @@ static int acpi_load_old(QEMUFile *f, void *opaque, int version_id) 
    int ret, i;

    uint16_t temp;



    ret = pci_device_load(&s->dev, f);

    ret = pci_device_load(PCI_DEVICE(s), f);

    if (ret < 0) {

        return ret;

    }
@@ -283,7 +294,7 @@ static const VMStateDescription vmstate_acpi = { 
    .load_state_old = acpi_load_old,

    .post_load = vmstate_acpi_post_load,

    .fields      = (VMStateField []) {

        VMSTATE_PCI_DEVICE(dev, PIIX4PMState),

        VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState),

        VMSTATE_UINT16(ar.pm1.evt.sts, PIIX4PMState),

        VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState),

        VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState),
@@ -300,7 +311,7 @@ static const VMStateDescription vmstate_acpi = { 
static void acpi_piix_eject_slot(PIIX4PMState *s, unsigned slots)

{

    BusChild *kid, *next;

    BusState *bus = qdev_get_parent_bus(&s->dev.qdev);

    BusState *bus = qdev_get_parent_bus(DEVICE(s));

    int slot = ffs(slots) - 1;

    bool slot_free = true;
@@ -326,8 +337,7 @@ static void acpi_piix_eject_slot(PIIX4PMState *s, unsigned slots) 


static void piix4_update_hotplug(PIIX4PMState *s)

{

    PCIDevice *dev = &s->dev;

    BusState *bus = qdev_get_parent_bus(&dev->qdev);

    BusState *bus = qdev_get_parent_bus(DEVICE(s));

    BusChild *kid, *next;



    /* Execute any pending removes during reset */
@@ -355,7 +365,8 @@ static void piix4_update_hotplug(PIIX4PMState *s) 
static void piix4_reset(void *opaque)

{

    PIIX4PMState *s = opaque;

    uint8_t *pci_conf = s->dev.config;

    PCIDevice *d = PCI_DEVICE(s);

    uint8_t *pci_conf = d->config;



    pci_conf[0x58] = 0;

    pci_conf[0x59] = 0;
@@ -383,10 +394,11 @@ static void piix4_pm_powerdown_req(Notifier *n, void *opaque) 
static void piix4_pm_machine_ready(Notifier *n, void *opaque)

{

    PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready);

    MemoryRegion *io_as = pci_address_space_io(&s->dev);

    PCIDevice *d = PCI_DEVICE(s);

    MemoryRegion *io_as = pci_address_space_io(d);

    uint8_t *pci_conf;



    pci_conf = s->dev.config;

    pci_conf = d->config;

    pci_conf[0x5f] = 0x10 |

        (memory_region_present(io_as, 0x378) ? 0x80 : 0);

    pci_conf[0x63] = 0x60;
@@ -396,10 +408,10 @@ static void piix4_pm_machine_ready(Notifier *n, void *opaque) 


static int piix4_pm_initfn(PCIDevice *dev)

{

    PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev, dev);

    PIIX4PMState *s = PIIX4_PM(dev);

    uint8_t *pci_conf;



    pci_conf = s->dev.config;

    pci_conf = dev->config;

    pci_conf[0x06] = 0x80;

    pci_conf[0x07] = 0x02;

    pci_conf[0x09] = 0x00;
@@ -419,7 +431,7 @@ static int piix4_pm_initfn(PCIDevice *dev) 
    pci_conf[0x90] = s->smb_io_base | 1;

    pci_conf[0x91] = s->smb_io_base >> 8;

    pci_conf[0xd2] = 0x09;

    pm_smbus_init(&s->dev.qdev, &s->smb);

    pm_smbus_init(DEVICE(dev), &s->smb);

    memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1);

    memory_region_add_subregion(pci_address_space_io(dev),

                                s->smb_io_base, &s->smb.io);
@@ -450,18 +462,18 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base, 
                       qemu_irq sci_irq, qemu_irq smi_irq,

                       int kvm_enabled, FWCfgState *fw_cfg)

{

    PCIDevice *dev;

    DeviceState *dev;

    PIIX4PMState *s;



    dev = pci_create(bus, devfn, "PIIX4_PM");

    qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base);

    dev = DEVICE(pci_create(bus, devfn, TYPE_PIIX4_PM));

    qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base);



    s = DO_UPCAST(PIIX4PMState, dev, dev);

    s = PIIX4_PM(dev);

    s->irq = sci_irq;

    s->smi_irq = smi_irq;

    s->kvm_enabled = kvm_enabled;



    qdev_init_nofail(&dev->qdev);

    qdev_init_nofail(dev);



    if (fw_cfg) {

        uint8_t suspend[6] = {128, 0, 0, 129, 128, 128};
@@ -501,7 +513,7 @@ static void piix4_pm_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo piix4_pm_info = {

    .name          = "PIIX4_PM",

    .name          = TYPE_PIIX4_PM,

    .parent        = TYPE_PCI_DEVICE,

    .instance_size = sizeof(PIIX4PMState),

    .class_init    = piix4_pm_class_init,
@@ -679,7 +691,7 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, 
                          "acpi-pci-hotplug", PCI_HOTPLUG_SIZE);

    memory_region_add_subregion(parent, PCI_HOTPLUG_ADDR,

                                &s->io_pci);

    pci_bus_hotplug(bus, piix4_device_hotplug, &s->dev.qdev);

    pci_bus_hotplug(bus, piix4_device_hotplug, DEVICE(s));



    qemu_for_each_cpu(piix4_init_cpu_status, &s->gpe_cpu);

    memory_region_init_io(&s->io_cpu, OBJECT(s), &cpu_hotplug_ops, s,
@@ -705,8 +717,7 @@ static int piix4_device_hotplug(DeviceState *qdev, PCIDevice *dev, 
				PCIHotplugState state)

{

    int slot = PCI_SLOT(dev->devfn);

    PIIX4PMState *s = DO_UPCAST(PIIX4PMState, dev,

                                PCI_DEVICE(qdev));

    PIIX4PMState *s = PIIX4_PM(qdev);



    /* Don't send event when device is enabled during qemu machine creation:

     * it is present on boot, no hotplug event is necessary. We do send an

hw/block/fdc.c

+79 −47
Original line number Diff line number Diff line
@@ -544,8 +544,14 @@ struct FDCtrl { 
    uint8_t timer1;

};



#define TYPE_SYSBUS_FDC "sysbus-fdc"

#define SYSBUS_FDC(obj) OBJECT_CHECK(FDCtrlSysBus, (obj), TYPE_SYSBUS_FDC)



typedef struct FDCtrlSysBus {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    struct FDCtrl state;

} FDCtrlSysBus;
@@ -773,7 +779,7 @@ static const VMStateDescription vmstate_fdc = { 


static void fdctrl_external_reset_sysbus(DeviceState *d)

{

    FDCtrlSysBus *sys = container_of(d, FDCtrlSysBus, busdev.qdev);

    FDCtrlSysBus *sys = SYSBUS_FDC(d);

    FDCtrl *s = &sys->state;



    fdctrl_reset(s, 0);
@@ -1991,7 +1997,7 @@ static const BlockDevOps fdctrl_block_ops = { 
};



/* Init functions */

static int fdctrl_connect_drives(FDCtrl *fdctrl)

static void fdctrl_connect_drives(FDCtrl *fdctrl, Error **errp)

{

    unsigned int i;

    FDrive *drive;
@@ -2002,12 +2008,12 @@ static int fdctrl_connect_drives(FDCtrl *fdctrl) 


        if (drive->bs) {

            if (bdrv_get_on_error(drive->bs, 0) != BLOCKDEV_ON_ERROR_ENOSPC) {

                error_report("fdc doesn't support drive option werror");

                return -1;

                error_setg(errp, "fdc doesn't support drive option werror");

                return;

            }

            if (bdrv_get_on_error(drive->bs, 1) != BLOCKDEV_ON_ERROR_REPORT) {

                error_report("fdc doesn't support drive option rerror");

                return -1;

                error_setg(errp, "fdc doesn't support drive option rerror");

                return;

            }

        }
@@ -2017,7 +2023,6 @@ static int fdctrl_connect_drives(FDCtrl *fdctrl) 
            bdrv_set_dev_ops(drive->bs, &fdctrl_block_ops, drive);

        }

    }

    return 0;

}



ISADevice *fdctrl_init_isa(ISABus *bus, DriveInfo **fds)
@@ -2047,10 +2052,11 @@ void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, 
{

    FDCtrl *fdctrl;

    DeviceState *dev;

    SysBusDevice *sbd;

    FDCtrlSysBus *sys;



    dev = qdev_create(NULL, "sysbus-fdc");

    sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);

    dev = qdev_create(NULL, TYPE_SYSBUS_FDC);

    sys = SYSBUS_FDC(dev);

    fdctrl = &sys->state;

    fdctrl->dma_chann = dma_chann; /* FIXME */

    if (fds[0]) {
@@ -2060,8 +2066,9 @@ void fdctrl_init_sysbus(qemu_irq irq, int dma_chann, 
        qdev_prop_set_drive_nofail(dev, "driveB", fds[1]->bdrv);

    }

    qdev_init_nofail(dev);

    sysbus_connect_irq(&sys->busdev, 0, irq);

    sysbus_mmio_map(&sys->busdev, 0, mmio_base);

    sbd = SYS_BUS_DEVICE(dev);

    sysbus_connect_irq(sbd, 0, irq);

    sysbus_mmio_map(sbd, 0, mmio_base);

}



void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base,
@@ -2075,13 +2082,13 @@ void sun4m_fdctrl_init(qemu_irq irq, hwaddr io_base, 
        qdev_prop_set_drive_nofail(dev, "drive", fds[0]->bdrv);

    }

    qdev_init_nofail(dev);

    sys = DO_UPCAST(FDCtrlSysBus, busdev.qdev, dev);

    sysbus_connect_irq(&sys->busdev, 0, irq);

    sysbus_mmio_map(&sys->busdev, 0, io_base);

    sys = SYSBUS_FDC(dev);

    sysbus_connect_irq(SYS_BUS_DEVICE(sys), 0, irq);

    sysbus_mmio_map(SYS_BUS_DEVICE(sys), 0, io_base);

    *fdc_tc = qdev_get_gpio_in(dev, 0);

}



static int fdctrl_init_common(FDCtrl *fdctrl)

static void fdctrl_realize_common(FDCtrl *fdctrl, Error **errp)

{

    int i, j;

    static int command_tables_inited = 0;
@@ -2108,9 +2115,10 @@ static int fdctrl_init_common(FDCtrl *fdctrl) 
    fdctrl->config = FD_CONFIG_EIS | FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */

    fdctrl->num_floppies = MAX_FD;



    if (fdctrl->dma_chann != -1)

    if (fdctrl->dma_chann != -1) {

        DMA_register_channel(fdctrl->dma_chann, &fdctrl_transfer_handler, fdctrl);

    return fdctrl_connect_drives(fdctrl);

    }

    fdctrl_connect_drives(fdctrl, errp);

}



static const MemoryRegionPortio fdc_portio_list[] = {
@@ -2124,7 +2132,7 @@ static void isabus_fdc_realize(DeviceState *dev, Error **errp) 
    ISADevice *isadev = ISA_DEVICE(dev);

    FDCtrlISABus *isa = ISA_FDC(dev);

    FDCtrl *fdctrl = &isa->state;

    int ret;

    Error *err = NULL;



    isa_register_portio_list(isadev, isa->iobase, fdc_portio_list, fdctrl,

                             "fdc");
@@ -2133,9 +2141,9 @@ static void isabus_fdc_realize(DeviceState *dev, Error **errp) 
    fdctrl->dma_chann = isa->dma;



    qdev_set_legacy_instance_id(dev, isa->iobase, 2);

    ret = fdctrl_init_common(fdctrl);

    if (ret < 0) {

        error_setg(errp, "Floppy init failed.");

    fdctrl_realize_common(fdctrl, &err);

    if (err != NULL) {

        error_propagate(errp, err);

        return;

    }
@@ -2143,38 +2151,62 @@ static void isabus_fdc_realize(DeviceState *dev, Error **errp) 
    add_boot_device_path(isa->bootindexB, dev, "/floppy@1");

}



static int sysbus_fdc_init1(SysBusDevice *dev)

static void sysbus_fdc_initfn(Object *obj)

{

    FDCtrlSysBus *sys = DO_UPCAST(FDCtrlSysBus, busdev, dev);

    FDCtrlSysBus *sys = SYSBUS_FDC(obj);

    FDCtrl *fdctrl = &sys->state;

    int ret;



    memory_region_init_io(&fdctrl->iomem, OBJECT(sys), &fdctrl_mem_ops, fdctrl,

    memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_ops, fdctrl,

                          "fdc", 0x08);

    sysbus_init_mmio(dev, &fdctrl->iomem);

    sysbus_init_irq(dev, &fdctrl->irq);

    qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);

    fdctrl->dma_chann = -1;

}



    qdev_set_legacy_instance_id(&dev->qdev, 0 /* io */, 2); /* FIXME */

    ret = fdctrl_init_common(fdctrl);

static void sysbus_fdc_realize(DeviceState *dev, Error **errp)

{

    FDCtrlSysBus *sys = SYSBUS_FDC(dev);

    FDCtrl *fdctrl = &sys->state;

    SysBusDevice *b = SYS_BUS_DEVICE(dev);

    Error *err = NULL;



    return ret;

    sysbus_init_mmio(b, &fdctrl->iomem);

    sysbus_init_irq(b, &fdctrl->irq);

    qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);

    fdctrl->dma_chann = -1;



    qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */

    fdctrl_realize_common(fdctrl, &err);

    if (err != NULL) {

        error_propagate(errp, err);

        return;

    }

}



static int sun4m_fdc_init1(SysBusDevice *dev)

static void sun4m_fdc_initfn(Object *obj)

{

    FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state);

    FDCtrlSysBus *sys = SYSBUS_FDC(obj);

    FDCtrl *fdctrl = &sys->state;



    memory_region_init_io(&fdctrl->iomem, OBJECT(dev), &fdctrl_mem_strict_ops,

    memory_region_init_io(&fdctrl->iomem, obj, &fdctrl_mem_strict_ops,

                          fdctrl, "fdctrl", 0x08);

    sysbus_init_mmio(dev, &fdctrl->iomem);

    sysbus_init_irq(dev, &fdctrl->irq);

    qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1);

}



static void sun4m_fdc_realize(DeviceState *dev, Error **errp)

{

    FDCtrlSysBus *sys = SYSBUS_FDC(dev);

    FDCtrl *fdctrl = &sys->state;

    SysBusDevice *sbd = SYS_BUS_DEVICE(dev);

    Error *err = NULL;



    sysbus_init_mmio(sbd, &fdctrl->iomem);

    sysbus_init_irq(sbd, &fdctrl->irq);

    qdev_init_gpio_in(dev, fdctrl_handle_tc, 1);



    fdctrl->sun4m = 1;

    qdev_set_legacy_instance_id(&dev->qdev, 0 /* io */, 2); /* FIXME */

    return fdctrl_init_common(fdctrl);

    qdev_set_legacy_instance_id(dev, 0 /* io */, 2); /* FIXME */

    fdctrl_realize_common(fdctrl, &err);

    if (err != NULL) {

        error_propagate(errp, err);

        return;

    }

}



FDriveType isa_fdc_get_drive_type(ISADevice *fdc, int i)
@@ -2245,18 +2277,18 @@ static Property sysbus_fdc_properties[] = { 
static void sysbus_fdc_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);



    k->init = sysbus_fdc_init1;

    dc->realize = sysbus_fdc_realize;

    dc->reset = fdctrl_external_reset_sysbus;

    dc->vmsd = &vmstate_sysbus_fdc;

    dc->props = sysbus_fdc_properties;

}



static const TypeInfo sysbus_fdc_info = {

    .name          = "sysbus-fdc",

    .name          = TYPE_SYSBUS_FDC,

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(FDCtrlSysBus),

    .instance_init = sysbus_fdc_initfn,

    .class_init    = sysbus_fdc_class_init,

};
@@ -2268,9 +2300,8 @@ static Property sun4m_fdc_properties[] = { 
static void sun4m_fdc_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);



    k->init = sun4m_fdc_init1;

    dc->realize = sun4m_fdc_realize;

    dc->reset = fdctrl_external_reset_sysbus;

    dc->vmsd = &vmstate_sysbus_fdc;

    dc->props = sun4m_fdc_properties;
@@ -2280,6 +2311,7 @@ static const TypeInfo sun4m_fdc_info = { 
    .name          = "SUNW,fdtwo",

    .parent        = TYPE_SYS_BUS_DEVICE,

    .instance_size = sizeof(FDCtrlSysBus),

    .instance_init = sun4m_fdc_initfn,

    .class_init    = sun4m_fdc_class_init,

};

hw/block/pflash_cfi01.c

+17 −16
Original line number Diff line number Diff line
@@ -60,8 +60,14 @@ do { \ 
#define DPRINTF(fmt, ...) do { } while (0)

#endif



#define TYPE_CFI_PFLASH01 "cfi.pflash01"

#define CFI_PFLASH01(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH01)



struct pflash_t {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    BlockDriverState *bs;

    uint32_t nb_blocs;

    uint64_t sector_len;
@@ -563,9 +569,9 @@ static const MemoryRegionOps pflash_cfi01_ops_le = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



static int pflash_cfi01_init(SysBusDevice *dev)

static void pflash_cfi01_realize(DeviceState *dev, Error **errp)

{

    pflash_t *pfl = FROM_SYSBUS(typeof(*pfl), dev);

    pflash_t *pfl = CFI_PFLASH01(dev);

    uint64_t total_len;

    int ret;
@@ -584,7 +590,7 @@ static int pflash_cfi01_init(SysBusDevice *dev) 
        pfl->name, total_len);

    vmstate_register_ram(&pfl->mem, DEVICE(pfl));

    pfl->storage = memory_region_get_ram_ptr(&pfl->mem);

    sysbus_init_mmio(dev, &pfl->mem);

    sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);



    if (pfl->bs) {

        /* read the initial flash content */
@@ -593,7 +599,8 @@ static int pflash_cfi01_init(SysBusDevice *dev) 
        if (ret < 0) {

            vmstate_unregister_ram(&pfl->mem, DEVICE(pfl));

            memory_region_destroy(&pfl->mem);

            return 1;

            error_setg(errp, "failed to read the initial flash content");

            return;

        }

    }
@@ -690,8 +697,6 @@ static int pflash_cfi01_init(SysBusDevice *dev) 
    pfl->cfi_table[0x3c] = 0x00;



    pfl->cfi_table[0x3f] = 0x01; /* Number of protection fields */



    return 0;

}



static Property pflash_cfi01_properties[] = {
@@ -711,16 +716,15 @@ static Property pflash_cfi01_properties[] = { 
static void pflash_cfi01_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);



    k->init = pflash_cfi01_init;

    dc->realize = pflash_cfi01_realize;

    dc->props = pflash_cfi01_properties;

    dc->vmsd = &vmstate_pflash;

}





static const TypeInfo pflash_cfi01_info = {

    .name           = "cfi.pflash01",

    .name           = TYPE_CFI_PFLASH01,

    .parent         = TYPE_SYS_BUS_DEVICE,

    .instance_size  = sizeof(struct pflash_t),

    .class_init     = pflash_cfi01_class_init,
@@ -741,10 +745,7 @@ pflash_t *pflash_cfi01_register(hwaddr base, 
                                uint16_t id0, uint16_t id1,

                                uint16_t id2, uint16_t id3, int be)

{

    DeviceState *dev = qdev_create(NULL, "cfi.pflash01");

    SysBusDevice *busdev = SYS_BUS_DEVICE(dev);

    pflash_t *pfl = (pflash_t *)object_dynamic_cast(OBJECT(dev),

                                                    "cfi.pflash01");

    DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH01);



    if (bs && qdev_prop_set_drive(dev, "drive", bs)) {

        abort();
@@ -760,8 +761,8 @@ pflash_t *pflash_cfi01_register(hwaddr base, 
    qdev_prop_set_string(dev, "name", name);

    qdev_init_nofail(dev);



    sysbus_mmio_map(busdev, 0, base);

    return pfl;

    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    return CFI_PFLASH01(dev);

}



MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl)

hw/block/pflash_cfi02.c

+19 −17
Original line number Diff line number Diff line
@@ -55,8 +55,14 @@ do { \ 


#define PFLASH_LAZY_ROMD_THRESHOLD 42



#define TYPE_CFI_PFLASH02 "cfi.pflash02"

#define CFI_PFLASH02(obj) OBJECT_CHECK(pflash_t, (obj), TYPE_CFI_PFLASH02)



struct pflash_t {

    SysBusDevice busdev;

    /*< private >*/

    SysBusDevice parent_obj;

    /*< public >*/



    BlockDriverState *bs;

    uint32_t sector_len;

    uint32_t nb_blocs;
@@ -586,9 +592,9 @@ static const MemoryRegionOps pflash_cfi02_ops_le = { 
    .endianness = DEVICE_NATIVE_ENDIAN,

};



static int pflash_cfi02_init(SysBusDevice *dev)

static void pflash_cfi02_realize(DeviceState *dev, Error **errp)

{

    pflash_t *pfl = FROM_SYSBUS(typeof(*pfl), dev);

    pflash_t *pfl = CFI_PFLASH02(dev);

    uint32_t chip_len;

    int ret;
@@ -610,14 +616,16 @@ static int pflash_cfi02_init(SysBusDevice *dev) 
        /* read the initial flash content */

        ret = bdrv_read(pfl->bs, 0, pfl->storage, chip_len >> 9);

        if (ret < 0) {

            g_free(pfl);

            return 1;

            vmstate_unregister_ram(&pfl->orig_mem, DEVICE(pfl));

            memory_region_destroy(&pfl->orig_mem);

            error_setg(errp, "failed to read the initial flash content");

            return;

        }

    }



    pflash_setup_mappings(pfl);

    pfl->rom_mode = 1;

    sysbus_init_mmio(dev, &pfl->mem);

    sysbus_init_mmio(SYS_BUS_DEVICE(dev), &pfl->mem);



    if (pfl->bs) {

        pfl->ro = bdrv_is_read_only(pfl->bs);
@@ -706,8 +714,6 @@ static int pflash_cfi02_init(SysBusDevice *dev) 


    pfl->cfi_table[0x3b] = 0x00;

    pfl->cfi_table[0x3c] = 0x00;



    return 0;

}



static Property pflash_cfi02_properties[] = {
@@ -730,14 +736,13 @@ static Property pflash_cfi02_properties[] = { 
static void pflash_cfi02_class_init(ObjectClass *klass, void *data)

{

    DeviceClass *dc = DEVICE_CLASS(klass);

    SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);



    k->init = pflash_cfi02_init;

    dc->realize = pflash_cfi02_realize;

    dc->props = pflash_cfi02_properties;

}



static const TypeInfo pflash_cfi02_info = {

    .name           = "cfi.pflash02",

    .name           = TYPE_CFI_PFLASH02,

    .parent         = TYPE_SYS_BUS_DEVICE,

    .instance_size  = sizeof(struct pflash_t),

    .class_init     = pflash_cfi02_class_init,
@@ -760,10 +765,7 @@ pflash_t *pflash_cfi02_register(hwaddr base, 
                                uint16_t unlock_addr0, uint16_t unlock_addr1,

                                int be)

{

    DeviceState *dev = qdev_create(NULL, "cfi.pflash02");

    SysBusDevice *busdev = SYS_BUS_DEVICE(dev);

    pflash_t *pfl = (pflash_t *)object_dynamic_cast(OBJECT(dev),

                                                    "cfi.pflash02");

    DeviceState *dev = qdev_create(NULL, TYPE_CFI_PFLASH02);



    if (bs && qdev_prop_set_drive(dev, "drive", bs)) {

        abort();
@@ -782,6 +784,6 @@ pflash_t *pflash_cfi02_register(hwaddr base, 
    qdev_prop_set_string(dev, "name", name);

    qdev_init_nofail(dev);



    sysbus_mmio_map(busdev, 0, base);

    return pfl;

    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base);

    return CFI_PFLASH02(dev);

}

hw/display/vmware_vga.c

+21 −15
Original line number Diff line number Diff line
@@ -81,8 +81,16 @@ struct vmsvga_state_s { 
    int redraw_fifo_first, redraw_fifo_last;

};



#define TYPE_VMWARE_SVGA "vmware-svga"



#define VMWARE_SVGA(obj) \

    OBJECT_CHECK(struct pci_vmsvga_state_s, (obj), TYPE_VMWARE_SVGA)



struct pci_vmsvga_state_s {

    PCIDevice card;

    /*< private >*/

    PCIDevice parent_obj;

    /*< public >*/



    struct vmsvga_state_s chip;

    MemoryRegion io_bar;

};
@@ -787,7 +795,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address) 
    case SVGA_REG_FB_START: {

        struct pci_vmsvga_state_s *pci_vmsvga

            = container_of(s, struct pci_vmsvga_state_s, chip);

        ret = pci_get_bar_addr(&pci_vmsvga->card, 1);

        ret = pci_get_bar_addr(PCI_DEVICE(pci_vmsvga), 1);

        break;

    }
@@ -823,7 +831,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address) 
    case SVGA_REG_MEM_START: {

        struct pci_vmsvga_state_s *pci_vmsvga

            = container_of(s, struct pci_vmsvga_state_s, chip);

        ret = pci_get_bar_addr(&pci_vmsvga->card, 2);

        ret = pci_get_bar_addr(PCI_DEVICE(pci_vmsvga), 2);

        break;

    }
@@ -1092,8 +1100,7 @@ static void vmsvga_update_display(void *opaque) 


static void vmsvga_reset(DeviceState *dev)

{

    struct pci_vmsvga_state_s *pci =

        DO_UPCAST(struct pci_vmsvga_state_s, card.qdev, dev);

    struct pci_vmsvga_state_s *pci = VMWARE_SVGA(dev);

    struct vmsvga_state_s *s = &pci->chip;



    s->index = 0;
@@ -1172,7 +1179,7 @@ static const VMStateDescription vmstate_vmware_vga = { 
    .minimum_version_id = 0,

    .minimum_version_id_old = 0,

    .fields      = (VMStateField[]) {

        VMSTATE_PCI_DEVICE(card, struct pci_vmsvga_state_s),

        VMSTATE_PCI_DEVICE(parent_obj, struct pci_vmsvga_state_s),

        VMSTATE_STRUCT(chip, struct pci_vmsvga_state_s, 0,

                       vmstate_vmware_vga_internal, struct vmsvga_state_s),

        VMSTATE_END_OF_LIST()
@@ -1250,24 +1257,23 @@ static const MemoryRegionOps vmsvga_io_ops = { 


static int pci_vmsvga_initfn(PCIDevice *dev)

{

    struct pci_vmsvga_state_s *s =

        DO_UPCAST(struct pci_vmsvga_state_s, card, dev);

    struct pci_vmsvga_state_s *s = VMWARE_SVGA(dev);



    s->card.config[PCI_CACHE_LINE_SIZE] = 0x08;         /* Cache line size */

    s->card.config[PCI_LATENCY_TIMER] = 0x40;           /* Latency timer */

    s->card.config[PCI_INTERRUPT_LINE] = 0xff;          /* End */

    dev->config[PCI_CACHE_LINE_SIZE] = 0x08;

    dev->config[PCI_LATENCY_TIMER] = 0x40;

    dev->config[PCI_INTERRUPT_LINE] = 0xff;          /* End */



    memory_region_init_io(&s->io_bar, NULL, &vmsvga_io_ops, &s->chip,

                          "vmsvga-io", 0x10);

    memory_region_set_flush_coalesced(&s->io_bar);

    pci_register_bar(&s->card, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);

    pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_bar);



    vmsvga_init(DEVICE(dev), &s->chip,

                pci_address_space(dev), pci_address_space_io(dev));



    pci_register_bar(&s->card, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,

    pci_register_bar(dev, 1, PCI_BASE_ADDRESS_MEM_PREFETCH,

                     &s->chip.vga.vram);

    pci_register_bar(&s->card, 2, PCI_BASE_ADDRESS_MEM_PREFETCH,

    pci_register_bar(dev, 2, PCI_BASE_ADDRESS_MEM_PREFETCH,

                     &s->chip.fifo_ram);



    if (!dev->rom_bar) {
@@ -1303,7 +1309,7 @@ static void vmsvga_class_init(ObjectClass *klass, void *data) 
}



static const TypeInfo vmsvga_info = {

    .name          = "vmware-svga",

    .name          = TYPE_VMWARE_SVGA,

    .parent        = TYPE_PCI_DEVICE,

    .instance_size = sizeof(struct pci_vmsvga_state_s),

    .class_init    = vmsvga_class_init,