Commit 3661049f authored by Richard Henderson's avatar Richard Henderson
Browse files

hw/alpha: Don't machine check on missing pci i/o 



Not really correct, but we don't implement all of the random devices
that the kernel looks for.  This is good enough to keep us booting.

Signed-off-by: default avatarRichard Henderson <rth@twiddle.net>
parent 056e6bae

hw/alpha/alpha_sys.h

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ PCIBus *typhoon_init(ram_addr_t, ISABus **, qemu_irq *, AlphaCPU *[4], 
                     pci_map_irq_fn);



/* alpha_pci.c.  */

extern const MemoryRegionOps alpha_pci_ignore_ops;

extern const MemoryRegionOps alpha_pci_conf1_ops;

extern const MemoryRegionOps alpha_pci_iack_ops;

hw/alpha/pci.c

+26 −0
Original line number Diff line number Diff line
@@ -12,6 +12,32 @@ 
#include "sysemu/sysemu.h"





/* Fallback for unassigned PCI I/O operations.  Avoids MCHK.  */



static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)

{

    return 0;

}



static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)

{

}



const MemoryRegionOps alpha_pci_ignore_ops = {

    .read = ignore_read,

    .write = ignore_write,

    .endianness = DEVICE_LITTLE_ENDIAN,

    .valid = {

        .min_access_size = 1,

        .max_access_size = 8,

    },

    .impl = {

        .min_access_size = 1,

        .max_access_size = 8,

    },

};





/* PCI config space reads/writes, to byte-word addressable memory.  */

static uint64_t bw_conf1_read(void *opaque, hwaddr addr,

                              unsigned size)

hw/alpha/typhoon.c

+2 −1
Original line number Diff line number Diff line
@@ -764,7 +764,8 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, 
                                &s->pchip.reg_mem);



    /* Pchip0 PCI I/O, 0x801.FC00.0000, 32MB.  */

    memory_region_init(&s->pchip.reg_io, OBJECT(s), "pci0-io", 32*MB);

    memory_region_init_io(&s->pchip.reg_io, OBJECT(s), &alpha_pci_ignore_ops,

                          NULL, "pci0-io", 32*MB);

    memory_region_add_subregion(addr_space, 0x801fc000000ULL,

                                &s->pchip.reg_io);