Loading hw/block/fdc.c +4 −3 Original line number Diff line number Diff line Loading @@ -2149,7 +2149,8 @@ static int sysbus_fdc_init1(SysBusDevice *dev) FDCtrl *fdctrl = &sys->state; int ret; memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_ops, fdctrl, "fdc", 0x08); memory_region_init_io(&fdctrl->iomem, OBJECT(sys), &fdctrl_mem_ops, fdctrl, "fdc", 0x08); sysbus_init_mmio(dev, &fdctrl->iomem); sysbus_init_irq(dev, &fdctrl->irq); qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1); Loading @@ -2165,8 +2166,8 @@ static int sun4m_fdc_init1(SysBusDevice *dev) { FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state); memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_strict_ops, fdctrl, "fdctrl", 0x08); memory_region_init_io(&fdctrl->iomem, OBJECT(dev), &fdctrl_mem_strict_ops, fdctrl, "fdctrl", 0x08); sysbus_init_mmio(dev, &fdctrl->iomem); sysbus_init_irq(dev, &fdctrl->irq); qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1); Loading hw/block/nvme.c +2 −1 Original line number Diff line number Diff line Loading @@ -777,7 +777,8 @@ static int nvme_init(PCIDevice *pci_dev) n->sq = g_malloc0(sizeof(*n->sq)*n->num_queues); n->cq = g_malloc0(sizeof(*n->cq)*n->num_queues); memory_region_init_io(&n->iomem, NULL, &nvme_mmio_ops, n, "nvme", n->reg_size); memory_region_init_io(&n->iomem, OBJECT(n), &nvme_mmio_ops, n, "nvme", n->reg_size); pci_register_bar(&n->parent_obj, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64, &n->iomem); Loading hw/block/onenand.c +6 −4 Original line number Diff line number Diff line Loading @@ -113,9 +113,10 @@ static void onenand_mem_setup(OneNANDState *s) /* XXX: We should use IO_MEM_ROMD but we broke it earlier... * Both 0x0000 ... 0x01ff and 0x8000 ... 0x800f can be used to * write boot commands. Also take note of the BWPS bit. */ memory_region_init(&s->container, NULL, "onenand", 0x10000 << s->shift); memory_region_init(&s->container, OBJECT(s), "onenand", 0x10000 << s->shift); memory_region_add_subregion(&s->container, 0, &s->iomem); memory_region_init_alias(&s->mapped_ram, NULL, "onenand-mapped-ram", memory_region_init_alias(&s->mapped_ram, OBJECT(s), "onenand-mapped-ram", &s->ram, 0x0200 << s->shift, 0xbe00 << s->shift); memory_region_add_subregion_overlap(&s->container, Loading Loading @@ -768,7 +769,7 @@ static int onenand_initfn(SysBusDevice *dev) s->blockwp = g_malloc(s->blocks); s->density_mask = (s->id.dev & 0x08) ? (1 << (6 + ((s->id.dev >> 4) & 7))) : 0; memory_region_init_io(&s->iomem, NULL, &onenand_ops, s, "onenand", memory_region_init_io(&s->iomem, OBJECT(s), &onenand_ops, s, "onenand", 0x10000 << s->shift); if (!s->bdrv) { s->image = memset(g_malloc(size + (size >> 5)), Loading @@ -782,7 +783,8 @@ static int onenand_initfn(SysBusDevice *dev) } s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT), 0xff, (64 + 2) << PAGE_SHIFT); memory_region_init_ram(&s->ram, NULL, "onenand.ram", 0xc000 << s->shift); memory_region_init_ram(&s->ram, OBJECT(s), "onenand.ram", 0xc000 << s->shift); vmstate_register_ram_global(&s->ram); ram = memory_region_get_ram_ptr(&s->ram); s->boot[0] = ram + (0x0000 << s->shift); Loading hw/block/pflash_cfi01.c +1 −1 Original line number Diff line number Diff line Loading @@ -579,7 +579,7 @@ static int pflash_cfi01_init(SysBusDevice *dev) #endif memory_region_init_rom_device( &pfl->mem, NULL, &pfl->mem, OBJECT(dev), pfl->be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl, pfl->name, total_len); vmstate_register_ram(&pfl->mem, DEVICE(pfl)); Loading hw/block/pflash_cfi02.c +4 −4 Original line number Diff line number Diff line Loading @@ -100,11 +100,11 @@ static void pflash_setup_mappings(pflash_t *pfl) unsigned i; hwaddr size = memory_region_size(&pfl->orig_mem); memory_region_init(&pfl->mem, NULL, "pflash", pfl->mappings * size); memory_region_init(&pfl->mem, OBJECT(pfl), "pflash", pfl->mappings * size); pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings); for (i = 0; i < pfl->mappings; ++i) { memory_region_init_alias(&pfl->mem_mappings[i], NULL, "pflash-alias", &pfl->orig_mem, 0, size); memory_region_init_alias(&pfl->mem_mappings[i], OBJECT(pfl), "pflash-alias", &pfl->orig_mem, 0, size); memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]); } } Loading Loading @@ -600,7 +600,7 @@ static int pflash_cfi02_init(SysBusDevice *dev) return NULL; #endif memory_region_init_rom_device(&pfl->orig_mem, NULL, pfl->be ? memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ? &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, pfl, pfl->name, chip_len); vmstate_register_ram(&pfl->orig_mem, DEVICE(pfl)); Loading Loading
hw/block/fdc.c +4 −3 Original line number Diff line number Diff line Loading @@ -2149,7 +2149,8 @@ static int sysbus_fdc_init1(SysBusDevice *dev) FDCtrl *fdctrl = &sys->state; int ret; memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_ops, fdctrl, "fdc", 0x08); memory_region_init_io(&fdctrl->iomem, OBJECT(sys), &fdctrl_mem_ops, fdctrl, "fdc", 0x08); sysbus_init_mmio(dev, &fdctrl->iomem); sysbus_init_irq(dev, &fdctrl->irq); qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1); Loading @@ -2165,8 +2166,8 @@ static int sun4m_fdc_init1(SysBusDevice *dev) { FDCtrl *fdctrl = &(FROM_SYSBUS(FDCtrlSysBus, dev)->state); memory_region_init_io(&fdctrl->iomem, NULL, &fdctrl_mem_strict_ops, fdctrl, "fdctrl", 0x08); memory_region_init_io(&fdctrl->iomem, OBJECT(dev), &fdctrl_mem_strict_ops, fdctrl, "fdctrl", 0x08); sysbus_init_mmio(dev, &fdctrl->iomem); sysbus_init_irq(dev, &fdctrl->irq); qdev_init_gpio_in(&dev->qdev, fdctrl_handle_tc, 1); Loading
hw/block/nvme.c +2 −1 Original line number Diff line number Diff line Loading @@ -777,7 +777,8 @@ static int nvme_init(PCIDevice *pci_dev) n->sq = g_malloc0(sizeof(*n->sq)*n->num_queues); n->cq = g_malloc0(sizeof(*n->cq)*n->num_queues); memory_region_init_io(&n->iomem, NULL, &nvme_mmio_ops, n, "nvme", n->reg_size); memory_region_init_io(&n->iomem, OBJECT(n), &nvme_mmio_ops, n, "nvme", n->reg_size); pci_register_bar(&n->parent_obj, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | PCI_BASE_ADDRESS_MEM_TYPE_64, &n->iomem); Loading
hw/block/onenand.c +6 −4 Original line number Diff line number Diff line Loading @@ -113,9 +113,10 @@ static void onenand_mem_setup(OneNANDState *s) /* XXX: We should use IO_MEM_ROMD but we broke it earlier... * Both 0x0000 ... 0x01ff and 0x8000 ... 0x800f can be used to * write boot commands. Also take note of the BWPS bit. */ memory_region_init(&s->container, NULL, "onenand", 0x10000 << s->shift); memory_region_init(&s->container, OBJECT(s), "onenand", 0x10000 << s->shift); memory_region_add_subregion(&s->container, 0, &s->iomem); memory_region_init_alias(&s->mapped_ram, NULL, "onenand-mapped-ram", memory_region_init_alias(&s->mapped_ram, OBJECT(s), "onenand-mapped-ram", &s->ram, 0x0200 << s->shift, 0xbe00 << s->shift); memory_region_add_subregion_overlap(&s->container, Loading Loading @@ -768,7 +769,7 @@ static int onenand_initfn(SysBusDevice *dev) s->blockwp = g_malloc(s->blocks); s->density_mask = (s->id.dev & 0x08) ? (1 << (6 + ((s->id.dev >> 4) & 7))) : 0; memory_region_init_io(&s->iomem, NULL, &onenand_ops, s, "onenand", memory_region_init_io(&s->iomem, OBJECT(s), &onenand_ops, s, "onenand", 0x10000 << s->shift); if (!s->bdrv) { s->image = memset(g_malloc(size + (size >> 5)), Loading @@ -782,7 +783,8 @@ static int onenand_initfn(SysBusDevice *dev) } s->otp = memset(g_malloc((64 + 2) << PAGE_SHIFT), 0xff, (64 + 2) << PAGE_SHIFT); memory_region_init_ram(&s->ram, NULL, "onenand.ram", 0xc000 << s->shift); memory_region_init_ram(&s->ram, OBJECT(s), "onenand.ram", 0xc000 << s->shift); vmstate_register_ram_global(&s->ram); ram = memory_region_get_ram_ptr(&s->ram); s->boot[0] = ram + (0x0000 << s->shift); Loading
hw/block/pflash_cfi01.c +1 −1 Original line number Diff line number Diff line Loading @@ -579,7 +579,7 @@ static int pflash_cfi01_init(SysBusDevice *dev) #endif memory_region_init_rom_device( &pfl->mem, NULL, &pfl->mem, OBJECT(dev), pfl->be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl, pfl->name, total_len); vmstate_register_ram(&pfl->mem, DEVICE(pfl)); Loading
hw/block/pflash_cfi02.c +4 −4 Original line number Diff line number Diff line Loading @@ -100,11 +100,11 @@ static void pflash_setup_mappings(pflash_t *pfl) unsigned i; hwaddr size = memory_region_size(&pfl->orig_mem); memory_region_init(&pfl->mem, NULL, "pflash", pfl->mappings * size); memory_region_init(&pfl->mem, OBJECT(pfl), "pflash", pfl->mappings * size); pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings); for (i = 0; i < pfl->mappings; ++i) { memory_region_init_alias(&pfl->mem_mappings[i], NULL, "pflash-alias", &pfl->orig_mem, 0, size); memory_region_init_alias(&pfl->mem_mappings[i], OBJECT(pfl), "pflash-alias", &pfl->orig_mem, 0, size); memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]); } } Loading Loading @@ -600,7 +600,7 @@ static int pflash_cfi02_init(SysBusDevice *dev) return NULL; #endif memory_region_init_rom_device(&pfl->orig_mem, NULL, pfl->be ? memory_region_init_rom_device(&pfl->orig_mem, OBJECT(pfl), pfl->be ? &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, pfl, pfl->name, chip_len); vmstate_register_ram(&pfl->orig_mem, DEVICE(pfl)); Loading