Merge remote-tracking branch 'remotes/stsquad/tags/pull-softfloat-refactor-210218-1' into staging (2b78551f) · Commits · SUMMER2020 / students / proj-2021291

fpu/softfloat-macros.h

+48 −0

Original line number	Diff line number	Diff line
		@@ -625,6 +625,54 @@ static uint64_t estimateDiv128To64( uint64_t a0, uint64_t a1, uint64_t b )

		}

		/* From the GNU Multi Precision Library - longlong.h __udiv_qrnnd
		* (https://gmplib.org/repo/gmp/file/tip/longlong.h)
		*
		* Licensed under the GPLv2/LGPLv3
		*/
		static uint64_t div128To64(uint64_t n0, uint64_t n1, uint64_t d)
		{
		uint64_t d0, d1, q0, q1, r1, r0, m;

		d0 = (uint32_t)d;
		d1 = d >> 32;

		r1 = n1 % d1;
		q1 = n1 / d1;
		m = q1 * d0;
		r1 = (r1 << 32) \| (n0 >> 32);
		if (r1 < m) {
		q1 -= 1;
		r1 += d;
		if (r1 >= d) {
		if (r1 < m) {
		q1 -= 1;
		r1 += d;
		}
		}
		}
		r1 -= m;

		r0 = r1 % d1;
		q0 = r1 / d1;
		m = q0 * d0;
		r0 = (r0 << 32) \| (uint32_t)n0;
		if (r0 < m) {
		q0 -= 1;
		r0 += d;
		if (r0 >= d) {
		if (r0 < m) {
		q0 -= 1;
		r0 += d;
		}
		}
		}
		r0 -= m;

		/* Return remainder in LSB */
		return (q1 << 32) \| q0 \| (r0 != 0);
		}

		/*----------------------------------------------------------------------------
		\| Returns an approximation to the square root of the 32-bit significand given
		\| by `a'. Considered as an integer, `a' must be at least 2^31. If bit 0 of

fpu/softfloat-specialize.h

+3 −106

Original line number	Diff line number	Diff line
		@@ -447,7 +447,8 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status)
		static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
		flag aIsLargerSignificand)
		{
		/* ARM mandated NaN propagation rules: take the first of:
		/* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
		* the first of:
		* 1. A if it is signaling
		* 2. B if it is signaling
		* 3. A (quiet)
		@@ -728,58 +729,6 @@ static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status)
		}
		}

		/*----------------------------------------------------------------------------
		\| Takes three single-precision floating-point values `a', `b' and `c', one of
		\| which is a NaN, and returns the appropriate NaN result. If any of `a',
		\| `b' or `c' is a signaling NaN, the invalid exception is raised.
		\| The input infzero indicates whether ab was 0inf or inf*0 (in which case
		\| obviously c is a NaN, and whether to propagate c or some other NaN is
		\| implementation defined).
		----------------------------------------------------------------------------/

		static float32 propagateFloat32MulAddNaN(float32 a, float32 b,
		float32 c, flag infzero,
		float_status *status)
		{
		flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
		cIsQuietNaN, cIsSignalingNaN;
		int which;

		aIsQuietNaN = float32_is_quiet_nan(a, status);
		aIsSignalingNaN = float32_is_signaling_nan(a, status);
		bIsQuietNaN = float32_is_quiet_nan(b, status);
		bIsSignalingNaN = float32_is_signaling_nan(b, status);
		cIsQuietNaN = float32_is_quiet_nan(c, status);
		cIsSignalingNaN = float32_is_signaling_nan(c, status);

		if (aIsSignalingNaN \| bIsSignalingNaN \| cIsSignalingNaN) {
		float_raise(float_flag_invalid, status);
		}

		which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
		bIsQuietNaN, bIsSignalingNaN,
		cIsQuietNaN, cIsSignalingNaN, infzero, status);

		if (status->default_nan_mode) {
		/* Note that this check is after pickNaNMulAdd so that function
		* has an opportunity to set the Invalid flag.
		*/
		return float32_default_nan(status);
		}

		switch (which) {
		case 0:
		return float32_maybe_silence_nan(a, status);
		case 1:
		return float32_maybe_silence_nan(b, status);
		case 2:
		return float32_maybe_silence_nan(c, status);
		case 3:
		default:
		return float32_default_nan(status);
		}
		}

		#ifdef NO_SIGNALING_NANS
		int float64_is_quiet_nan(float64 a_, float_status *status)
		{
		@@ -935,58 +884,6 @@ static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status)
		}
		}

		/*----------------------------------------------------------------------------
		\| Takes three double-precision floating-point values `a', `b' and `c', one of
		\| which is a NaN, and returns the appropriate NaN result. If any of `a',
		\| `b' or `c' is a signaling NaN, the invalid exception is raised.
		\| The input infzero indicates whether ab was 0inf or inf*0 (in which case
		\| obviously c is a NaN, and whether to propagate c or some other NaN is
		\| implementation defined).
		----------------------------------------------------------------------------/

		static float64 propagateFloat64MulAddNaN(float64 a, float64 b,
		float64 c, flag infzero,
		float_status *status)
		{
		flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
		cIsQuietNaN, cIsSignalingNaN;
		int which;

		aIsQuietNaN = float64_is_quiet_nan(a, status);
		aIsSignalingNaN = float64_is_signaling_nan(a, status);
		bIsQuietNaN = float64_is_quiet_nan(b, status);
		bIsSignalingNaN = float64_is_signaling_nan(b, status);
		cIsQuietNaN = float64_is_quiet_nan(c, status);
		cIsSignalingNaN = float64_is_signaling_nan(c, status);

		if (aIsSignalingNaN \| bIsSignalingNaN \| cIsSignalingNaN) {
		float_raise(float_flag_invalid, status);
		}

		which = pickNaNMulAdd(aIsQuietNaN, aIsSignalingNaN,
		bIsQuietNaN, bIsSignalingNaN,
		cIsQuietNaN, cIsSignalingNaN, infzero, status);

		if (status->default_nan_mode) {
		/* Note that this check is after pickNaNMulAdd so that function
		* has an opportunity to set the Invalid flag.
		*/
		return float64_default_nan(status);
		}

		switch (which) {
		case 0:
		return float64_maybe_silence_nan(a, status);
		case 1:
		return float64_maybe_silence_nan(b, status);
		case 2:
		return float64_maybe_silence_nan(c, status);
		case 3:
		default:
		return float64_default_nan(status);
		}
		}

		#ifdef NO_SIGNALING_NANS
		int floatx80_is_quiet_nan(floatx80 a_, float_status *status)
		{

fpu/softfloat.c

+3356 −4154

File changed.

Preview size limit exceeded, changes collapsed.

include/fpu/softfloat-types.h

0 → 100644

+179 −0

Original line number	Diff line number	Diff line
		/*
		* QEMU float support
		*
		* The code in this source file is derived from release 2a of the SoftFloat
		* IEC/IEEE Floating-point Arithmetic Package. Those parts of the code (and
		* some later contributions) are provided under that license, as detailed below.
		* It has subsequently been modified by contributors to the QEMU Project,
		* so some portions are provided under:
		* the SoftFloat-2a license
		* the BSD license
		* GPL-v2-or-later
		*
		* This header holds definitions for code that might be dealing with
		* softfloat types but not need access to the actual library functions.
		*/
		/*
		===============================================================================
		This C header file is part of the SoftFloat IEC/IEEE Floating-point
		Arithmetic Package, Release 2a.

		Written by John R. Hauser. This work was made possible in part by the
		International Computer Science Institute, located at Suite 600, 1947 Center
		Street, Berkeley, California 94704. Funding was partially provided by the
		National Science Foundation under grant MIP-9311980. The original version
		of this code was written as part of a project to build a fixed-point vector
		processor in collaboration with the University of California at Berkeley,
		overseen by Profs. Nelson Morgan and John Wawrzynek. More information
		is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
		arithmetic/SoftFloat.html'.

		THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
		has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
		TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
		PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
		AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.

		Derivative works are acceptable, even for commercial purposes, so long as
		(1) they include prominent notice that the work is derivative, and (2) they
		include prominent notice akin to these four paragraphs for those parts of
		this code that are retained.

		===============================================================================
		*/

		/* BSD licensing:
		* Copyright (c) 2006, Fabrice Bellard
		* All rights reserved.
		*
		* Redistribution and use in source and binary forms, with or without
		* modification, are permitted provided that the following conditions are met:
		*
		* 1. Redistributions of source code must retain the above copyright notice,
		* this list of conditions and the following disclaimer.
		*
		* 2. Redistributions in binary form must reproduce the above copyright notice,
		* this list of conditions and the following disclaimer in the documentation
		* and/or other materials provided with the distribution.
		*
		* 3. Neither the name of the copyright holder nor the names of its contributors
		* may be used to endorse or promote products derived from this software without
		* specific prior written permission.
		*
		* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
		* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
		* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
		* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
		* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
		* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
		* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
		* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
		* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
		* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
		* THE POSSIBILITY OF SUCH DAMAGE.
		*/

		/* Portions of this work are licensed under the terms of the GNU GPL,
		* version 2 or later. See the COPYING file in the top-level directory.
		*/

		#ifndef SOFTFLOAT_TYPES_H
		#define SOFTFLOAT_TYPES_H

		/* This 'flag' type must be able to hold at least 0 and 1. It should
		* probably be replaced with 'bool' but the uses would need to be audited
		* to check that they weren't accidentally relying on it being a larger type.
		*/
		typedef uint8_t flag;

		/*
		* Software IEC/IEEE floating-point types.
		*/

		typedef uint16_t float16;
		typedef uint32_t float32;
		typedef uint64_t float64;
		#define float16_val(x) (x)
		#define float32_val(x) (x)
		#define float64_val(x) (x)
		#define make_float16(x) (x)
		#define make_float32(x) (x)
		#define make_float64(x) (x)
		#define const_float16(x) (x)
		#define const_float32(x) (x)
		#define const_float64(x) (x)
		typedef struct {
		uint64_t low;
		uint16_t high;
		} floatx80;
		#define make_floatx80(exp, mant) ((floatx80) { mant, exp })
		#define make_floatx80_init(exp, mant) { .low = mant, .high = exp }
		typedef struct {
		#ifdef HOST_WORDS_BIGENDIAN
		uint64_t high, low;
		#else
		uint64_t low, high;
		#endif
		} float128;
		#define make_float128(high_, low_) ((float128) { .high = high_, .low = low_ })
		#define make_float128_init(high_, low_) { .high = high_, .low = low_ }

		/*
		* Software IEC/IEEE floating-point underflow tininess-detection mode.
		*/

		enum {
		float_tininess_after_rounding = 0,
		float_tininess_before_rounding = 1
		};

		/*
		*Software IEC/IEEE floating-point rounding mode.
		*/

		enum {
		float_round_nearest_even = 0,
		float_round_down = 1,
		float_round_up = 2,
		float_round_to_zero = 3,
		float_round_ties_away = 4,
		/* Not an IEEE rounding mode: round to the closest odd mantissa value */
		float_round_to_odd = 5,
		};

		/*
		* Software IEC/IEEE floating-point exception flags.
		*/

		enum {
		float_flag_invalid = 1,
		float_flag_divbyzero = 4,
		float_flag_overflow = 8,
		float_flag_underflow = 16,
		float_flag_inexact = 32,
		float_flag_input_denormal = 64,
		float_flag_output_denormal = 128
		};


		/*
		* Floating Point Status. Individual architectures may maintain
		* several versions of float_status for different functions. The
		* correct status for the operation is then passed by reference to
		* most of the softfloat functions.
		*/

		typedef struct float_status {
		signed char float_detect_tininess;
		signed char float_rounding_mode;
		uint8_t float_exception_flags;
		signed char floatx80_rounding_precision;
		/* should denormalised results go to zero and set the inexact flag? */
		flag flush_to_zero;
		/* should denormalised inputs go to zero and set the input_denormal flag? */
		flag flush_inputs_to_zero;
		flag default_nan_mode;
		flag snan_bit_is_one;
		} float_status;

		#endif /* SOFTFLOAT_TYPES_H */

include/fpu/softfloat.h

+68 −134

Original line number	Diff line number	Diff line
		@@ -82,12 +82,6 @@ this code that are retained.
		#ifndef SOFTFLOAT_H
		#define SOFTFLOAT_H

		/* This 'flag' type must be able to hold at least 0 and 1. It should
		* probably be replaced with 'bool' but the uses would need to be audited
		* to check that they weren't accidentally relying on it being a larger type.
		*/
		typedef uint8_t flag;

		#define LIT64( a ) a##LL

		/*----------------------------------------------------------------------------
		@@ -100,110 +94,7 @@ enum {
		float_relation_unordered = 2
		};

		/*----------------------------------------------------------------------------
		\| Software IEC/IEEE floating-point types.
		----------------------------------------------------------------------------/
		/* Use structures for soft-float types. This prevents accidentally mixing
		them with native int/float types. A sufficiently clever compiler and
		sane ABI should be able to see though these structs. However
		x86/gcc 3.x seems to struggle a bit, so leave them disabled by default. */
		//#define USE_SOFTFLOAT_STRUCT_TYPES
		#ifdef USE_SOFTFLOAT_STRUCT_TYPES
		typedef struct {
		uint16_t v;
		} float16;
		#define float16_val(x) (((float16)(x)).v)
		#define make_float16(x) __extension__ ({ float16 f16_val = {x}; f16_val; })
		#define const_float16(x) { x }
		typedef struct {
		uint32_t v;
		} float32;
		/* The cast ensures an error if the wrong type is passed. */
		#define float32_val(x) (((float32)(x)).v)
		#define make_float32(x) __extension__ ({ float32 f32_val = {x}; f32_val; })
		#define const_float32(x) { x }
		typedef struct {
		uint64_t v;
		} float64;
		#define float64_val(x) (((float64)(x)).v)
		#define make_float64(x) __extension__ ({ float64 f64_val = {x}; f64_val; })
		#define const_float64(x) { x }
		#else
		typedef uint16_t float16;
		typedef uint32_t float32;
		typedef uint64_t float64;
		#define float16_val(x) (x)
		#define float32_val(x) (x)
		#define float64_val(x) (x)
		#define make_float16(x) (x)
		#define make_float32(x) (x)
		#define make_float64(x) (x)
		#define const_float16(x) (x)
		#define const_float32(x) (x)
		#define const_float64(x) (x)
		#endif
		typedef struct {
		uint64_t low;
		uint16_t high;
		} floatx80;
		#define make_floatx80(exp, mant) ((floatx80) { mant, exp })
		#define make_floatx80_init(exp, mant) { .low = mant, .high = exp }
		typedef struct {
		#ifdef HOST_WORDS_BIGENDIAN
		uint64_t high, low;
		#else
		uint64_t low, high;
		#endif
		} float128;
		#define make_float128(high_, low_) ((float128) { .high = high_, .low = low_ })
		#define make_float128_init(high_, low_) { .high = high_, .low = low_ }

		/*----------------------------------------------------------------------------
		\| Software IEC/IEEE floating-point underflow tininess-detection mode.
		----------------------------------------------------------------------------/
		enum {
		float_tininess_after_rounding = 0,
		float_tininess_before_rounding = 1
		};

		/*----------------------------------------------------------------------------
		\| Software IEC/IEEE floating-point rounding mode.
		----------------------------------------------------------------------------/
		enum {
		float_round_nearest_even = 0,
		float_round_down = 1,
		float_round_up = 2,
		float_round_to_zero = 3,
		float_round_ties_away = 4,
		/* Not an IEEE rounding mode: round to the closest odd mantissa value */
		float_round_to_odd = 5,
		};

		/*----------------------------------------------------------------------------
		\| Software IEC/IEEE floating-point exception flags.
		----------------------------------------------------------------------------/
		enum {
		float_flag_invalid = 1,
		float_flag_divbyzero = 4,
		float_flag_overflow = 8,
		float_flag_underflow = 16,
		float_flag_inexact = 32,
		float_flag_input_denormal = 64,
		float_flag_output_denormal = 128
		};

		typedef struct float_status {
		signed char float_detect_tininess;
		signed char float_rounding_mode;
		uint8_t float_exception_flags;
		signed char floatx80_rounding_precision;
		/* should denormalised results go to zero and set the inexact flag? */
		flag flush_to_zero;
		/* should denormalised inputs go to zero and set the input_denormal flag? */
		flag flush_inputs_to_zero;
		flag default_nan_mode;
		flag snan_bit_is_one;
		} float_status;
		#include "fpu/softfloat-types.h"

		static inline void set_float_detect_tininess(int val, float_status *status)
		{
		@@ -277,6 +168,7 @@ void float_raise(uint8_t flags, float_status *status);
		\| If `a' is denormal and we are in flush-to-zero mode then set the
		\| input-denormal exception and return zero. Otherwise just return the value.
		----------------------------------------------------------------------------/
		float16 float16_squash_input_denormal(float16 a, float_status *status);
		float32 float32_squash_input_denormal(float32 a, float_status *status);
		float64 float64_squash_input_denormal(float64 a, float_status *status);

		@@ -298,9 +190,13 @@ enum {
		/*----------------------------------------------------------------------------
		\| Software IEC/IEEE integer-to-floating-point conversion routines.
		----------------------------------------------------------------------------/
		float32 int16_to_float32(int16_t, float_status *status);
		float32 int32_to_float32(int32_t, float_status *status);
		float64 int16_to_float64(int16_t, float_status *status);
		float64 int32_to_float64(int32_t, float_status *status);
		float32 uint16_to_float32(uint16_t, float_status *status);
		float32 uint32_to_float32(uint32_t, float_status *status);
		float64 uint16_to_float64(uint16_t, float_status *status);
		float64 uint32_to_float64(uint32_t, float_status *status);
		floatx80 int32_to_floatx80(int32_t, float_status *status);
		float128 int32_to_float128(int32_t, float_status *status);
		@@ -312,27 +208,6 @@ float32 uint64_to_float32(uint64_t, float_status *status);
		float64 uint64_to_float64(uint64_t, float_status *status);
		float128 uint64_to_float128(uint64_t, float_status *status);

		/* We provide the int16 versions for symmetry of API with float-to-int */
		static inline float32 int16_to_float32(int16_t v, float_status *status)
		{
		return int32_to_float32(v, status);
		}

		static inline float32 uint16_to_float32(uint16_t v, float_status *status)
		{
		return uint32_to_float32(v, status);
		}

		static inline float64 int16_to_float64(int16_t v, float_status *status)
		{
		return int32_to_float64(v, status);
		}

		static inline float64 uint16_to_float64(uint16_t v, float_status *status)
		{
		return uint32_to_float64(v, status);
		}

		/*----------------------------------------------------------------------------
		\| Software half-precision conversion routines.
		----------------------------------------------------------------------------/
		@@ -340,10 +215,46 @@ float16 float32_to_float16(float32, flag, float_status *status);
		float32 float16_to_float32(float16, flag, float_status *status);
		float16 float64_to_float16(float64 a, flag ieee, float_status *status);
		float64 float16_to_float64(float16 a, flag ieee, float_status *status);
		int16_t float16_to_int16(float16, float_status *status);
		uint16_t float16_to_uint16(float16 a, float_status *status);
		int16_t float16_to_int16_round_to_zero(float16, float_status *status);
		uint16_t float16_to_uint16_round_to_zero(float16 a, float_status *status);
		int32_t float16_to_int32(float16, float_status *status);
		uint32_t float16_to_uint32(float16 a, float_status *status);
		int32_t float16_to_int32_round_to_zero(float16, float_status *status);
		uint32_t float16_to_uint32_round_to_zero(float16 a, float_status *status);
		int64_t float16_to_int64(float16, float_status *status);
		uint64_t float16_to_uint64(float16 a, float_status *status);
		int64_t float16_to_int64_round_to_zero(float16, float_status *status);
		uint64_t float16_to_uint64_round_to_zero(float16 a, float_status *status);
		float16 int16_to_float16(int16_t a, float_status *status);
		float16 int32_to_float16(int32_t a, float_status *status);
		float16 int64_to_float16(int64_t a, float_status *status);
		float16 uint16_to_float16(uint16_t a, float_status *status);
		float16 uint32_to_float16(uint32_t a, float_status *status);
		float16 uint64_to_float16(uint64_t a, float_status *status);

		/*----------------------------------------------------------------------------
		\| Software half-precision operations.
		----------------------------------------------------------------------------/

		float16 float16_round_to_int(float16, float_status *status);
		float16 float16_add(float16, float16, float_status *status);
		float16 float16_sub(float16, float16, float_status *status);
		float16 float16_mul(float16, float16, float_status *status);
		float16 float16_muladd(float16, float16, float16, int, float_status *status);
		float16 float16_div(float16, float16, float_status *status);
		float16 float16_scalbn(float16, int, float_status *status);
		float16 float16_min(float16, float16, float_status *status);
		float16 float16_max(float16, float16, float_status *status);
		float16 float16_minnum(float16, float16, float_status *status);
		float16 float16_maxnum(float16, float16, float_status *status);
		float16 float16_minnummag(float16, float16, float_status *status);
		float16 float16_maxnummag(float16, float16, float_status *status);
		float16 float16_sqrt(float16, float_status *status);
		int float16_compare(float16, float16, float_status *status);
		int float16_compare_quiet(float16, float16, float_status *status);

		int float16_is_quiet_nan(float16, float_status *status);
		int float16_is_signaling_nan(float16, float_status *status);
		float16 float16_maybe_silence_nan(float16, float_status *status);
		@@ -373,6 +284,32 @@ static inline int float16_is_zero_or_denormal(float16 a)
		return (float16_val(a) & 0x7c00) == 0;
		}

		static inline float16 float16_abs(float16 a)
		{
		/* Note that abs does not handle NaN specially, nor does
		* it flush denormal inputs to zero.
		*/
		return make_float16(float16_val(a) & 0x7fff);
		}

		static inline float16 float16_chs(float16 a)
		{
		/* Note that chs does not handle NaN specially, nor does
		* it flush denormal inputs to zero.
		*/
		return make_float16(float16_val(a) ^ 0x8000);
		}

		static inline float16 float16_set_sign(float16 a, int sign)
		{
		return make_float16((float16_val(a) & 0x7fff) \| (sign << 15));
		}

		#define float16_zero make_float16(0)
		#define float16_one make_float16(0x3c00)
		#define float16_half make_float16(0x3800)
		#define float16_infinity make_float16(0x7c00)

		/*----------------------------------------------------------------------------
		\| The pattern for a default generated half-precision NaN.
		----------------------------------------------------------------------------/
		@@ -479,8 +416,6 @@ static inline float32 float32_set_sign(float32 a, int sign)

		#define float32_zero make_float32(0)
		#define float32_one make_float32(0x3f800000)
		#define float32_ln2 make_float32(0x3f317218)
		#define float32_pi make_float32(0x40490fdb)
		#define float32_half make_float32(0x3f000000)
		#define float32_infinity make_float32(0x7f800000)

		@@ -593,7 +528,6 @@ static inline float64 float64_set_sign(float64 a, int sign)
		#define float64_zero make_float64(0)
		#define float64_one make_float64(0x3ff0000000000000LL)
		#define float64_ln2 make_float64(0x3fe62e42fefa39efLL)
		#define float64_pi make_float64(0x400921fb54442d18LL)
		#define float64_half make_float64(0x3fe0000000000000LL)
		#define float64_infinity make_float64(0x7ff0000000000000LL)