Commit 259186a7 authored by Andreas Färber's avatar Andreas Färber
Browse files

cpu: Move halted and interrupt_request fields to CPUState 



Both fields are used in VMState, thus need to be moved together.
Explicitly zero them on reset since they were located before
breakpoints.

Pass PowerPCCPU to kvmppc_handle_halt().

Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
parent 21317bc2

cpu-exec.c

+18 −16
Original line number Diff line number Diff line
@@ -203,12 +203,12 @@ int cpu_exec(CPUArchState *env) 
    uint8_t *tc_ptr;

    tcg_target_ulong next_tb;



    if (env->halted) {

    if (cpu->halted) {

        if (!cpu_has_work(cpu)) {

            return EXCP_HALTED;

        }



        env->halted = 0;

        cpu->halted = 0;

    }



    cpu_single_env = env;
@@ -278,14 +278,14 @@ int cpu_exec(CPUArchState *env) 


            next_tb = 0; /* force lookup of first TB */

            for(;;) {

                interrupt_request = env->interrupt_request;

                interrupt_request = cpu->interrupt_request;

                if (unlikely(interrupt_request)) {

                    if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) {

                        /* Mask out external interrupts for this step. */

                        interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;

                    }

                    if (interrupt_request & CPU_INTERRUPT_DEBUG) {

                        env->interrupt_request &= ~CPU_INTERRUPT_DEBUG;

                        cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;

                        env->exception_index = EXCP_DEBUG;

                        cpu_loop_exit(env);

                    }
@@ -293,8 +293,8 @@ int cpu_exec(CPUArchState *env) 
    defined(TARGET_PPC) || defined(TARGET_ALPHA) || defined(TARGET_CRIS) || \

    defined(TARGET_MICROBLAZE) || defined(TARGET_LM32) || defined(TARGET_UNICORE32)

                    if (interrupt_request & CPU_INTERRUPT_HALT) {

                        env->interrupt_request &= ~CPU_INTERRUPT_HALT;

                        env->halted = 1;

                        cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;

                        cpu->halted = 1;

                        env->exception_index = EXCP_HLT;

                        cpu_loop_exit(env);

                    }
@@ -302,7 +302,7 @@ int cpu_exec(CPUArchState *env) 
#if defined(TARGET_I386)

#if !defined(CONFIG_USER_ONLY)

                    if (interrupt_request & CPU_INTERRUPT_POLL) {

                        env->interrupt_request &= ~CPU_INTERRUPT_POLL;

                        cpu->interrupt_request &= ~CPU_INTERRUPT_POLL;

                        apic_poll_irq(env->apic_state);

                    }

#endif
@@ -319,17 +319,17 @@ int cpu_exec(CPUArchState *env) 
                            !(env->hflags & HF_SMM_MASK)) {

                            cpu_svm_check_intercept_param(env, SVM_EXIT_SMI,

                                                          0);

                            env->interrupt_request &= ~CPU_INTERRUPT_SMI;

                            cpu->interrupt_request &= ~CPU_INTERRUPT_SMI;

                            do_smm_enter(env);

                            next_tb = 0;

                        } else if ((interrupt_request & CPU_INTERRUPT_NMI) &&

                                   !(env->hflags2 & HF2_NMI_MASK)) {

                            env->interrupt_request &= ~CPU_INTERRUPT_NMI;

                            cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;

                            env->hflags2 |= HF2_NMI_MASK;

                            do_interrupt_x86_hardirq(env, EXCP02_NMI, 1);

                            next_tb = 0;

                        } else if (interrupt_request & CPU_INTERRUPT_MCE) {

                            env->interrupt_request &= ~CPU_INTERRUPT_MCE;

                            cpu->interrupt_request &= ~CPU_INTERRUPT_MCE;

                            do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0);

                            next_tb = 0;

                        } else if ((interrupt_request & CPU_INTERRUPT_HARD) &&
@@ -341,7 +341,8 @@ int cpu_exec(CPUArchState *env) 
                            int intno;

                            cpu_svm_check_intercept_param(env, SVM_EXIT_INTR,

                                                          0);

                            env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);

                            cpu->interrupt_request &= ~(CPU_INTERRUPT_HARD |

                                                        CPU_INTERRUPT_VIRQ);

                            intno = cpu_get_pic_interrupt(env);

                            qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);

                            do_interrupt_x86_hardirq(env, intno, 1);
@@ -359,7 +360,7 @@ int cpu_exec(CPUArchState *env) 
                            intno = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, control.int_vector));

                            qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing virtual hardware INT=0x%02x\n", intno);

                            do_interrupt_x86_hardirq(env, intno, 1);

                            env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;

                            cpu->interrupt_request &= ~CPU_INTERRUPT_VIRQ;

                            next_tb = 0;

#endif

                        }
@@ -370,8 +371,9 @@ int cpu_exec(CPUArchState *env) 
                    }

                    if (interrupt_request & CPU_INTERRUPT_HARD) {

                        ppc_hw_interrupt(env);

                        if (env->pending_interrupts == 0)

                            env->interrupt_request &= ~CPU_INTERRUPT_HARD;

                        if (env->pending_interrupts == 0) {

                            cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;

                        }

                        next_tb = 0;

                    }

#elif defined(TARGET_LM32)
@@ -548,8 +550,8 @@ int cpu_exec(CPUArchState *env) 
#endif

                   /* Don't use the cached interrupt_request value,

                      do_interrupt may have updated the EXITTB flag. */

                    if (env->interrupt_request & CPU_INTERRUPT_EXITTB) {

                        env->interrupt_request &= ~CPU_INTERRUPT_EXITTB;

                    if (cpu->interrupt_request & CPU_INTERRUPT_EXITTB) {

                        cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;

                        /* ensure that no TB jump will be modified as

                           the program flow was changed */

                        next_tb = 0;

cpus.c

+2 −2
Original line number Diff line number Diff line
@@ -72,7 +72,7 @@ static bool cpu_thread_is_idle(CPUArchState *env) 
    if (cpu->stopped || !runstate_is_running()) {

        return true;

    }

    if (!env->halted || qemu_cpu_has_work(cpu) ||

    if (!cpu->halted || qemu_cpu_has_work(cpu) ||

        kvm_async_interrupts_enabled()) {

        return false;

    }
@@ -1198,7 +1198,7 @@ CpuInfoList *qmp_query_cpus(Error **errp) 
        info->value = g_malloc0(sizeof(*info->value));

        info->value->CPU = cpu->cpu_index;

        info->value->current = (env == first_cpu);

        info->value->halted = env->halted;

        info->value->halted = cpu->halted;

        info->value->thread_id = cpu->thread_id;

#if defined(TARGET_I386)

        info->value->has_pc = true;

exec.c

+9 −7
Original line number Diff line number Diff line
@@ -223,12 +223,12 @@ void cpu_exec_init_all(void) 


static int cpu_common_post_load(void *opaque, int version_id)

{

    CPUArchState *env = opaque;

    CPUState *cpu = opaque;



    /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the

       version_id is increased. */

    env->interrupt_request &= ~0x01;

    tlb_flush(env, 1);

    cpu->interrupt_request &= ~0x01;

    tlb_flush(cpu->env_ptr, 1);



    return 0;

}
@@ -240,8 +240,8 @@ static const VMStateDescription vmstate_cpu_common = { 
    .minimum_version_id_old = 1,

    .post_load = cpu_common_post_load,

    .fields      = (VMStateField []) {

        VMSTATE_UINT32(halted, CPUArchState),

        VMSTATE_UINT32(interrupt_request, CPUArchState),

        VMSTATE_UINT32(halted, CPUState),

        VMSTATE_UINT32(interrupt_request, CPUState),

        VMSTATE_END_OF_LIST()

    }

};
@@ -293,7 +293,7 @@ void cpu_exec_init(CPUArchState *env) 
#if defined(CONFIG_USER_ONLY)

    cpu_list_unlock();

#endif

    vmstate_register(NULL, cpu_index, &vmstate_cpu_common, env);

    vmstate_register(NULL, cpu_index, &vmstate_cpu_common, cpu);

#if defined(CPU_SAVE_VERSION) && !defined(CONFIG_USER_ONLY)

    register_savevm(NULL, "cpu", cpu_index, CPU_SAVE_VERSION,

                    cpu_save, cpu_load, env);
@@ -494,7 +494,9 @@ void cpu_single_step(CPUArchState *env, int enabled) 


void cpu_reset_interrupt(CPUArchState *env, int mask)

{

    env->interrupt_request &= ~mask;

    CPUState *cpu = ENV_GET_CPU(env);



    cpu->interrupt_request &= ~mask;

}



void cpu_exit(CPUArchState *env)

gdbstub.c

+1 −1
Original line number Diff line number Diff line
@@ -2408,7 +2408,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf) 
                cpu_synchronize_state(env);

                len = snprintf((char *)mem_buf, sizeof(mem_buf),

                               "CPU#%d [%s]", cpu->cpu_index,

                               env->halted ? "halted " : "running");

                               cpu->halted ? "halted " : "running");

                memtohex(buf, mem_buf, len);

                put_packet(s, buf);

            }

hw/arm/omap1.c

+5 −2
Original line number Diff line number Diff line
@@ -1721,6 +1721,7 @@ static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr, 
                                 unsigned size)

{

    struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;

    CPUState *cpu = CPU(s->cpu);



    if (size != 2) {

        return omap_badwidth_read16(opaque, addr);
@@ -1737,8 +1738,9 @@ static uint64_t omap_clkdsp_read(void *opaque, hwaddr addr, 
        return s->clkm.dsp_rstct2;



    case 0x18:	/* DSP_SYSST */

        cpu = CPU(s->cpu);

        return (s->clkm.clocking_scheme << 11) | s->clkm.cold_start |

                (s->cpu->env.halted << 6);      /* Quite useless... */

                (cpu->halted << 6);      /* Quite useless... */

    }



    OMAP_BAD_REG(addr);
@@ -3754,8 +3756,9 @@ static void omap_setup_dsp_mapping(MemoryRegion *system_memory, 
void omap_mpu_wakeup(void *opaque, int irq, int req)

{

    struct omap_mpu_state_s *mpu = (struct omap_mpu_state_s *) opaque;

    CPUState *cpu = CPU(mpu->cpu);



    if (mpu->cpu->env.halted) {

    if (cpu->halted) {

        cpu_interrupt(&mpu->cpu->env, CPU_INTERRUPT_EXITTB);

    }

}