Commit 232e5537 authored by Peter Maydell's avatar Peter Maydell
Browse files

Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.12-pull-request' into staging 



# gpg: Signature made Thu 04 Jan 2018 16:37:32 GMT
# gpg:                using RSA key 0xF30C38BD3F2FBE3C
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>"
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>"
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>"
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier/tags/m68k-for-2.12-pull-request:
  target/m68k: fix m68k_cpu_dump_state()
  target/m68k: add the Interrupt Stack Pointer
  target/m68k: add andi/ori/eori to SR/CCR
  target/m68k: add 680x0 "move to SR" instruction
  target/m68k: move CCR/SR functions
  target/m68k: implement fsave/frestore
  target/m68k: add reset
  target/m68k: add cpush/cinv
  target/m68k: softmmu cleanup
  target/m68k: add move16
  target/m68k: add chk and chk2
  target/m68k: manage 680x0 stack frames
  target/m68k: add CPU_LOG_INT trace
  target/m68k: use insn_pc to generate instruction fault address
  linux-user, m68k: correctly manage SR in context
  target/m68k: fix gen_get_ccr()
  target-m68k: sync CC_OP before gen_jmp_tb()

Signed-off-by: default avatarPeter Maydell <peter.maydell@linaro.org>
parents 4bd797af cc523026

linux-user/main.c

+7 −0
Original line number Diff line number Diff line
@@ -2985,6 +2985,13 @@ void cpu_loop(CPUM68KState *env) 
            info._sifields._sigfault._addr = env->pc;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_CHK:

            info.si_signo = TARGET_SIGFPE;

            info.si_errno = 0;

            info.si_code = TARGET_FPE_INTOVF;

            info._sifields._sigfault._addr = env->pc;

            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);

            break;

        case EXCP_DIV0:

            info.si_signo = TARGET_SIGFPE;

            info.si_errno = 0;

linux-user/signal.c

+4 −3
Original line number Diff line number Diff line
@@ -5612,13 +5612,14 @@ struct target_rt_sigframe 
static void setup_sigcontext(struct target_sigcontext *sc, CPUM68KState *env,

                             abi_ulong mask)

{

    uint32_t sr = (env->sr & 0xff00) | cpu_m68k_get_ccr(env);

    __put_user(mask, &sc->sc_mask);

    __put_user(env->aregs[7], &sc->sc_usp);

    __put_user(env->dregs[0], &sc->sc_d0);

    __put_user(env->dregs[1], &sc->sc_d1);

    __put_user(env->aregs[0], &sc->sc_a0);

    __put_user(env->aregs[1], &sc->sc_a1);

    __put_user(env->sr, &sc->sc_sr);

    __put_user(sr, &sc->sc_sr);

    __put_user(env->pc, &sc->sc_pc);

}
@@ -5634,7 +5635,7 @@ restore_sigcontext(CPUM68KState *env, struct target_sigcontext *sc) 
    __get_user(env->aregs[1], &sc->sc_a1);

    __get_user(env->pc, &sc->sc_pc);

    __get_user(temp, &sc->sc_sr);

    env->sr = (env->sr & 0xff00) | (temp & 0xff);

    cpu_m68k_set_ccr(env, temp);

}



/*
@@ -5726,7 +5727,7 @@ static inline int target_rt_setup_ucontext(struct target_ucontext *uc, 
                                           CPUM68KState *env)

{

    target_greg_t *gregs = uc->tuc_mcontext.gregs;

    uint32_t sr = cpu_m68k_get_ccr(env);

    uint32_t sr = (env->sr & 0xff00) | cpu_m68k_get_ccr(env);



    __put_user(TARGET_MCONTEXT_VERSION, &uc->tuc_mcontext.version);

    __put_user(env->dregs[0], &gregs[0]);

target/m68k/cpu.c

+15 −5
Original line number Diff line number Diff line
@@ -55,17 +55,17 @@ static void m68k_cpu_reset(CPUState *s) 
    mcc->parent_reset(s);



    memset(env, 0, offsetof(CPUM68KState, end_reset_fields));

#if !defined(CONFIG_USER_ONLY)

    env->sr = 0x2700;

#ifdef CONFIG_SOFTMMU

    cpu_m68k_set_sr(env, SR_S | SR_I);

#else

    cpu_m68k_set_sr(env, 0);

#endif

    m68k_switch_sp(env);

    for (i = 0; i < 8; i++) {

        env->fregs[i].d = nan;

    }

    cpu_m68k_set_fpcr(env, 0);

    env->fpsr = 0;



    cpu_m68k_set_ccr(env, 0);

    /* TODO: We should set PC from the interrupt vector.  */

    env->pc = 0;

}
@@ -134,9 +134,18 @@ static void m68020_cpu_initfn(Object *obj) 
    m68k_set_feature(env, M68K_FEATURE_CAS);

    m68k_set_feature(env, M68K_FEATURE_BKPT);

    m68k_set_feature(env, M68K_FEATURE_RTD);

    m68k_set_feature(env, M68K_FEATURE_CHK2);

}

#define m68030_cpu_initfn m68020_cpu_initfn

#define m68040_cpu_initfn m68020_cpu_initfn



static void m68040_cpu_initfn(Object *obj)

{

    M68kCPU *cpu = M68K_CPU(obj);

    CPUM68KState *env = &cpu->env;



    m68020_cpu_initfn(obj);

    m68k_set_feature(env, M68K_FEATURE_M68040);

}



static void m68060_cpu_initfn(Object *obj)

{
@@ -156,6 +165,7 @@ static void m68060_cpu_initfn(Object *obj) 
    m68k_set_feature(env, M68K_FEATURE_CAS);

    m68k_set_feature(env, M68K_FEATURE_BKPT);

    m68k_set_feature(env, M68K_FEATURE_RTD);

    m68k_set_feature(env, M68K_FEATURE_CHK2);

}



static void m5208_cpu_initfn(Object *obj)

target/m68k/cpu.h

+82 −2
Original line number Diff line number Diff line
@@ -45,6 +45,8 @@ 
#define EXCP_ADDRESS        3   /* Address error.  */

#define EXCP_ILLEGAL        4   /* Illegal instruction.  */

#define EXCP_DIV0           5   /* Divide by zero */

#define EXCP_CHK            6   /* CHK, CHK2 Instructions */

#define EXCP_TRAPCC         7   /* FTRAPcc, TRAPcc, TRAPV Instructions */

#define EXCP_PRIVILEGE      8   /* Privilege violation.  */

#define EXCP_TRACE          9

#define EXCP_LINEA          10  /* Unimplemented line-A (MAC) opcode.  */
@@ -53,6 +55,9 @@ 
#define EXCP_DEBEGBP        13  /* Breakpoint debug interrupt.  */

#define EXCP_FORMAT         14  /* RTE format error.  */

#define EXCP_UNINITIALIZED  15

#define EXCP_SPURIOUS       24  /* Spurious interrupt */

#define EXCP_INT_LEVEL_1    25  /* Level 1 Interrupt autovector */

#define EXCP_INT_LEVEL_7    31  /* Level 7 Interrupt autovector */

#define EXCP_TRAP0          32   /* User trap #0.  */

#define EXCP_TRAP15         47   /* User trap #15.  */

#define EXCP_FP_BSUN        48 /* Branch Set on Unordered */
@@ -63,6 +68,9 @@ 
#define EXCP_FP_OVFL        53 /* Overflow */

#define EXCP_FP_SNAN        54 /* Signaling Not-A-Number */

#define EXCP_FP_UNIMP       55 /* Unimplemented Data type */

#define EXCP_MMU_CONF       56  /* MMU Configuration Error */

#define EXCP_MMU_ILLEGAL    57  /* MMU Illegal Operation Error */

#define EXCP_MMU_ACCESS     58  /* MMU Access Level Violation Error */

#define EXCP_UNSUPPORTED    61



#define EXCP_RTE            0x100
@@ -81,7 +89,7 @@ typedef struct CPUM68KState { 


    /* SSP and USP.  The current_sp is stored in aregs[7], the other here.  */

    int current_sp;

    uint32_t sp[2];

    uint32_t sp[3];



    /* Condition flags.  */

    uint32_t cc_op;
@@ -170,6 +178,7 @@ int cpu_m68k_signal_handler(int host_signum, void *pinfo, 
                           void *puc);

uint32_t cpu_m68k_get_ccr(CPUM68KState *env);

void cpu_m68k_set_ccr(CPUM68KState *env, uint32_t);

void cpu_m68k_set_sr(CPUM68KState *env, uint32_t);

void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val);
@@ -210,10 +219,79 @@ typedef enum { 
#define SR_I  0x0700

#define SR_M  0x1000

#define SR_S  0x2000

#define SR_T  0x8000

#define SR_T_SHIFT 14

#define SR_T  0xc000



#define M68K_SSP    0

#define M68K_USP    1

#define M68K_ISP    2



/* m68k Control Registers */



/* ColdFire */

/* Memory Management Control Registers */

#define M68K_CR_ASID     0x003

#define M68K_CR_ACR0     0x004

#define M68K_CR_ACR1     0x005

#define M68K_CR_ACR2     0x006

#define M68K_CR_ACR3     0x007

#define M68K_CR_MMUBAR   0x008



/* Processor Miscellaneous Registers */

#define M68K_CR_PC       0x80F



/* Local Memory and Module Control Registers */

#define M68K_CR_ROMBAR0  0xC00

#define M68K_CR_ROMBAR1  0xC01

#define M68K_CR_RAMBAR0  0xC04

#define M68K_CR_RAMBAR1  0xC05

#define M68K_CR_MPCR     0xC0C

#define M68K_CR_EDRAMBAR 0xC0D

#define M68K_CR_SECMBAR  0xC0E

#define M68K_CR_MBAR     0xC0F



/* Local Memory Address Permutation Control Registers */

#define M68K_CR_PCR1U0   0xD02

#define M68K_CR_PCR1L0   0xD03

#define M68K_CR_PCR2U0   0xD04

#define M68K_CR_PCR2L0   0xD05

#define M68K_CR_PCR3U0   0xD06

#define M68K_CR_PCR3L0   0xD07

#define M68K_CR_PCR1U1   0xD0A

#define M68K_CR_PCR1L1   0xD0B

#define M68K_CR_PCR2U1   0xD0C

#define M68K_CR_PCR2L1   0xD0D

#define M68K_CR_PCR3U1   0xD0E

#define M68K_CR_PCR3L1   0xD0F



/* MC680x0 */

/* MC680[1234]0/CPU32 */

#define M68K_CR_SFC      0x000

#define M68K_CR_DFC      0x001

#define M68K_CR_USP      0x800

#define M68K_CR_VBR      0x801 /* + Coldfire */



/* MC680[234]0 */

#define M68K_CR_CACR     0x002 /* + Coldfire */

#define M68K_CR_CAAR     0x802 /* MC68020 and MC68030 only */

#define M68K_CR_MSP      0x803

#define M68K_CR_ISP      0x804



/* MC68040/MC68LC040 */

#define M68K_CR_TC       0x003

#define M68K_CR_ITT0     0x004

#define M68K_CR_ITT1     0x005

#define M68K_CR_DTT0     0x006

#define M68K_CR_DTT1     0x007

#define M68K_CR_MMUSR    0x805

#define M68K_CR_URP      0x806

#define M68K_CR_SRP      0x807



/* MC68EC040 */

#define M68K_CR_IACR0    0x004

#define M68K_CR_IACR1    0x005

#define M68K_CR_DACR0    0x006

#define M68K_CR_DACR1    0x007



#define M68K_FPIAR_SHIFT  0

#define M68K_FPIAR        (1 << M68K_FPIAR_SHIFT)
@@ -296,6 +374,8 @@ enum m68k_features { 
    M68K_FEATURE_CAS,

    M68K_FEATURE_BKPT,

    M68K_FEATURE_RTD,

    M68K_FEATURE_CHK2,

    M68K_FEATURE_M68040, /* instructions specific to MC68040 */

};



static inline int m68k_feature(CPUM68KState *env, int feature)

target/m68k/gdbstub.c

+1 −1
Original line number Diff line number Diff line
@@ -63,7 +63,7 @@ int m68k_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) 
    } else {

        switch (n) {

        case 16:

            env->sr = tmp;

            cpu_m68k_set_sr(env, tmp);

            break;

        case 17:

            env->pc = tmp;