Skip to content
Commit 5a4b6f8e authored by Joe Ramsay's avatar Joe Ramsay Committed by Szabolcs Nagy
Browse files

aarch64: Optimise vecmath logs

* Transpose table layout for improved memory access
* Use half-vector special comparisons for AdvSIMD
* Improve register use near special-case branches
  - Due to the presence of a function call, return value would get
    mov-d out of x0 in order to facilitate PCS. By moving the final
    computation after the branch this can be avoided

Also change SVE routines to use overloaded intrinsics for readability.
parent 480a0dfe
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment